# Invocation command line: # /data/caar/spec/hpc2021-1.0.2/bin/harness/runhpc --config=nvhpc.cfg --reportable --tune=base -ranks 4 tiny # output_root was not used for this run ############################################################################ ###################################################################### # Example configuration file for the NVIDIA HPC SDK Compilers # # Before using this config file, copy it to a new config (such as nvhpc.cfg) and edit as needed # # Defines: "model" => "mpi", "acc", "omp", "tgt", "tgtgpu" default "mpi" # "label" => ext base label, default "nv" # # MPI-only Command: # runhpc -c nvhpc --reportable -T base --define model=mpi --ranks=40 tiny # # OpenACC offload to GPU Command: # runhpc -c nvhpc --reportable -T base --define model=acc --ranks=4 tiny # Add "--define ucx" if using OpenMPI 4 with UCX support. # # OpenACC offload to Multicore CPU Command: # runhpc -c nvhpc --reportable -T base --define model=accmc --ranks=4 tiny # # OpenMP Command: # runhpc -c nvhpc --reportable -T base --define model=omp --ranks=1 --threads=40 tiny # # OpenMP Target Offload to Host Command: # runhpc -c nvhpc --reportable -T base --define model=tgt --ranks=1 --threads=40 tiny # # OpenMP Target Offload to GPU Command: # runhpc -c nvhpc --reportable -T base --define model=tgtgpu --ranks=4 tiny # ####################################################################### %ifndef %{label} # IF label is not set use nv % define label nvhpc %endif %ifndef %{model} # IF model is not set use mpi % define model acc pmodel = ACC %endif teeout = yes # Adjust the number of make jobs to use here makeflags=-j 24 flagsurl000=http://www.spec.org/hpc2021/flags/nv2021_flags.xml # Tester Information license_num = 065A test_sponsor = Helmholtz-Zentrum Dresden - Rossendorf tester = Helmholtz-Zentrum Dresden - Rossendorf ###################################################### # SUT Section ###################################################### #include: Example_SUT.inc # ----- Begin inclusion of 'Example_SUT.inc' ############################################################################ ###################################################### # Example configuration information for a # system under test (SUT) Section ###################################################### # General SUT info system_vendor = Transtec system_name = Hemera: Supermicro SuperServer 1029GQ-TXRT (Intel Xeon Gold 6136, Tesla P100-SXM2-16GB) hw_avail = Jul-2017 sw_avail = Jul-2021 prepared_by = Jeffrey Kelling # Computation node info # [Node_Description: Hardware] node_compute_syslbl = Compute Node node_compute_order = 1 node_compute_count = 1 node_compute_purpose = compute node_compute_hw_vendor = Intel node_compute_hw_model = SuperServer 1029GQ-TXRT node_compute_hw_cpu_name = Intel Xeon Gold 6136 node_compute_hw_ncpuorder = 1 chips node_compute_hw_nchips = 1 node_compute_hw_ncores = 12 node_compute_hw_ncoresperchip = 12 node_compute_hw_nthreadspercore = 1 node_compute_hw_cpu_char = Intel Turbo Boost Technology up to 3.7 GHz node_compute_hw_cpu_mhz = 3000 node_compute_hw_pcache = 32 KB I + 32 KB D on chip per core node_compute_hw_scache = 1 MB I+D on chip per core node_compute_hw_tcache000= 25344 KB I+D on chip per chip node_compute_hw_ocache = None node_compute_hw_memory = 384 GB (12 x 32GB 2Rx4 PC4-2666V-RB2-12) node_compute_hw_disk = 1 x 500 GB node_compute_hw_other = None #[Node_Description: Accelerator] node_compute_hw_accel_model = Tesla P100-SXM2-16GB node_compute_hw_accel_count = 4 node_compute_hw_accel_vendor= NVIDIA Corporation node_compute_hw_accel_type = GPU node_compute_hw_accel_connect = PCIe 3.0 16x node_compute_hw_accel_ecc = Yes node_compute_hw_accel_desc = -- #[Node_Description: Software] node_compute_hw_adapter_fs_model = Mellanox MT4115 node_compute_hw_adapter_fs_count = 2 node_compute_hw_adapter_fs_slot_type = PCI-Express 3.0 x16 node_compute_hw_adapter_fs_data_rate = 100 Gb/s node_compute_hw_adapter_fs_ports_used = 2 node_compute_hw_adapter_fs_interconnect = EDR Infiniband node_compute_hw_adapter_fs_driver = -- node_compute_hw_adapter_fs_firmware = 12.28.2006 node_compute_sw_os000 = CentOS Linux release 7.9.2009 (Core) node_compute_sw_os001 = 3.10.0-1160.6.1.el7.x86_64 node_compute_sw_localfile = xfs node_compute_sw_sharedfile000= GPFS Version 5.0.5.0 node_compute_sw_sharedfile001 = 6 NSD (vendor: NEC) node_compute_sw_sharedfile002 = 5 building blocks (vendor: NetApp): node_compute_sw_sharedfile003 = 2x (240 x 8 TB HDD) node_compute_sw_sharedfile004 = 1x (180 x 12 TB HDD) node_compute_sw_sharedfile005 = 1x (240 x 16 TB HDD) node_compute_sw_sharedfile006 = 1x (120 x 16 TB HDD) node_compute_sw_state = Multi-user, run level 3 node_compute_sw_other = None #[Fileserver] #[Interconnect] interconnect_fs_syslbl = Infiniband (EDR) interconnect_fs_order = 1 interconnect_fs_purpose = MPI Traffic, GPFS interconnect_fs_hw_vendor = Mellanox Technologies interconnect_fs_hw_model = Mellanox SB7790 interconnect_fs_hw_switch_fs_model000= 36 x EDR 100 Gb/s interconnect_fs_hw_switch_fs_count = 2 interconnect_fs_hw_switch_fs_ports = 36 interconnect_fs_hw_topo = Mesh (blocking factor: 8:1) interconnect_fs_hw_switch_fs_data_rate = 100 Gb/s interconnect_fs_hw_switch_fs_firmware = -- ####################################################################### # End of SUT section # If this config file were to be applied to several SUTs, edits would # be needed only ABOVE this point. ###################################################################### # ---- End inclusion of '/data/caar/spec/hpc2021-1.0.2/config/Example_SUT.inc' #[Software] sw_compiler000 = C/C++/Fortran: Version 21.7 of sw_compiler001 = NVIDIA HPC SDK for Linux sw_mpi_library = OpenMPI Version 4.0.5 sw_mpi_other = None system_class = Homogenous Cluster sw_other = None #[General notes] ####################################################################### # End of SUT section ###################################################################### ###################################################################### # The header section of the config file. Must appear # before any instances of "section markers" (see below) # # ext = how the binaries you generated will be identified # tune = specify "base" or "peak" or "all" label = %{label}_%{model} tune = base output_format = text use_submit_for_speed = 1 # Setting 'strict_rundir_verify=0' will allow direct source code modifications # but will disable the ability to create reportable results. # May be useful for academic and research purposes # strict_rundir_verify = 0 # Compiler Settings default: CC = mpicc CXX = mpicxx FC = mpif90 # Compiler Version Flags CC_VERSION_OPTION = -V CXX_VERSION_OPTION = -V FC_VERSION_OPTION = -V # MPI options and binding environment, dependent upon Model being run # Adjust to match your system %ifdef %{ucx} # if using OpenMPI with UCX support, these settings are needed with use of CUDA Aware MPI # without these flags, LBM is known to hang when using OpenACC and OpenMP Target to GPUs preENV_UCX_MEMTYPE_CACHE=n preENV_UCX_TLS=self,shm,cuda_copy %endif MPIRUN_OPTS = --bind-to socket # Note that SPH_EXA is known to hang when using multiple nodes with some versions of UCX, # to work around, add the following setting: #MPIRUN_OPTS += --mca topo basic submit = mpirun ${MPIRUN_OPTS} -np $ranks $[top]/mpirunCUDA.sh $command # submit = mpirun ${MPIRUN_OPTS} -np $ranks $command ####################################################################### # Optimization # Note that SPEC baseline rules require that all uses of a given compiler # use the same flags in the same order. See the SPEChpc Run Rules # for more details # http://www.spec.org/hpc2021/Docs/runrules.html # # OPTIMIZE = flags applicable to all compilers # FOPTIMIZE = flags appliable to the Fortran compiler # COPTIMIZE = flags appliable to the C compiler # CXXOPTIMIZE = flags appliable to the C++ compiler # # See your compiler manual for information on the flags available # for your compiler # Compiler flags applied to all models default=base=default: OPTIMIZE = -w -Mfprelaxed -Mnouniform -Mstack_arrays -fast CXXPORTABILITY = --c++17 # OpenACC (GPU) flags %if %{model} eq 'acc' pmodel=ACC OPTIMIZE += -acc=gpu -Minfo=accel -DSPEC_ACCEL_AWARE_MPI %endif # OpenACC (Multicore CPU) flags %if %{model} eq 'accmc' pmodel=ACC OPTIMIZE += -acc=multicore -Minfo=accel 521.miniswp_t: PORTABILITY+= -DSPEC_USE_HOST_THREADS=1 %endif # OpenMP Threaded (CPU) flags %if %{model} eq 'omp' pmodel=OMP OPTIMIZE += -mp -Minfo=mp %endif # OpenMP Targeting host flags %if %{model} eq 'tgt' pmodel=TGT OPTIMIZE += -mp -Minfo=mp # Note that NVHPC is in the process of adding OpenMP # array reduction support so this option may be removed # in the future 513.soma_t: PORTABILITY+=-DSPEC_NO_VAR_ARRAY_REDUCE 521.miniswp_t: PORTABILITY+= -DSPEC_USE_HOST_THREADS=1 %endif # OpenMP Targeting GPU flags %if %{model} eq 'tgtgpu' pmodel=TGT OPTIMIZE += -mp=gpu -Minfo=mp %endif # No peak flags set, so make peak use the same flags as base default=peak=default: basepeak=1 # The following section was added automatically, and contains settings that # did not appear in the original configuration file, but were added to the # raw file after the run. default: notes_submit_000 =The config file option 'submit' was used. notes_submit_005 = MPI startup command: notes_submit_010 = mpirun --bind-to socket -np $ranks $[top]/mpirunCUDA.sh $command notes_submit_015 = contents of $[top]/mpirunCUDA.sh notes_submit_020 = #!/bin/bash notes_submit_025 = export CUDA_VISIBLE_DEVICES=$OMPI_COMM_WORLD_LOCAL_RANK notes_submit_030 = $@