# Invocation command line: # /home/cpu2017/bin/harness/runcpu --action validate --define default-platform-flags --configfile ic19.1u1-lin-core-avx512-speed-20200306_revA.cfg --define cores=36 --tune base,peak --output_format all --define smt-on --define drop_caches --nopower --runmode speed --tune base:peak --size refspeed fpspeed # output_root was not used for this run ############################################################################ #------------------------------------------------------------------------------ # This is a sample SPEC CPU2017 config file. It is applicable for: # # Compiler name/version: Intel(R) C/C++ and Fortran 19.0u1 Compilers for Linux # Operating system version: Redhat Enterprise Linux 7.5, GLIBC 2.17 # Hardware: Intel(R) processors supporting CORE-AVX512 tuning # # If you wish to build your own: # (1) Copy this to a new name ssor ------------------------------------------------------- # # Optionally edit if you wish: %define build_ncpus 8 # controls number of simultaneous compiles # Used to date the label %define version 20200306_revA # Used for the optimization tuning part of the label (not required) %if defined(%{noopt}) %define opt_label -noopt %elif defined(%{medopt}) %define opt_label -medopt %else %define opt_label %endif # Used for labeling static linked builds (not required) %if defined(%{static}) %define static_label -static %else %define static_label %endif #--------- Label -------------------------------------------------------------- # Arbitrary string, tags your binaries & directories. # Two Suggestions: # (1) Change this label as you try new ideas. label = ic19.1u1-lin-core-avx512-speed%{opt_label}%{static_label}-%{version} # (2) Make the label meaningful to YOU. #--------- Global Settings ---------------------------------------------------- # For info, see: # https://www.spec.org/auto/cpu2017/Docs/config.html#fieldname XXX # Example: https://www.spec.org/auto/cpu2017/Docs/config.html#tune ######################################################## # ATTENTION ATTENTION ATTENTION ######################################################## # # NOTE If you change fail_build then PLEASE also # change the line 'define version', because # SPEC review tools use 'label' to track binaries. # ######################################################## # # vvvvvvvvvvvv # do not change unless you read NOTE above fail_build=0 # do not change unless you read NOTE above # ^^^^^^^^^^^^ # do not change unless you read NOTE above # ######################################################## # action = validate command_add_redirect = 1 line_width = 1020 log_line_width = 1020 makeflags = -j%{build_ncpus} output_format = txt,cfg,pdf,csv preenv = 1 tune = base bench_post_setup = sync parallel_test = 1 mean_anyway = 1 reportable = 1 # Set some environment variables preENV_OMP_STACKSIZE = 192M %ifdef %{intspeedaffinity} preENV_KMP_AFFINITY = granularity=fine,scatter %else %if defined(%{smt-on}) preENV_KMP_AFFINITY = granularity=fine,compact,1,0 %else preENV_KMP_AFFINITY = granularity=fine,compact %endif %endif #Reference the flags files flagsurl000=http://www.spec.org/cpu2017/flags/Intel-ic19.1u1-official-linux64_revA.xml %ifdef %{default-platform-flags} flagsurl001=http://www.spec.org/cpu2017/flags/Tyrone-Platform-Settings-V1.2-CLX-revB.xml %endif # Set some environment variables # Retain unused virtual memory for later reuse. This avoids out of memory errors for certain benchmarks. preENV_MALLOC_CONF = retain:true intspeed: preENV_LD_LIBRARY_PATH = $[top]/lib/intel64:$[top]/je5.0.1-64 fpspeed: preENV_LD_LIBRARY_PATH = $[top]/lib/intel64:$[top]/je5.0.1-64 #--------- Compilers ---------------------------------------------------------- intspeed,fpspeed: # How to say "Show me your version, please" CC_VERSION_OPTION = -V CXX_VERSION_OPTION = -V FC_VERSION_OPTION = -V JEMALLOC32_DIR = /usr/local/je5.0.1-32/lib JEMALLOC64_DIR = /usr/local/je5.0.1-64/lib INTEL64_DIR = /usr/local/IntelCompiler19/compilers_and_libraries_2020.1.217/linux/compiler/lib/intel64_lin LLVMgold_DIR = /usr/local/IntelCompiler19/compilers_and_libraries_2020.1.217/linux/bin/../lib/LLVMgold.so %if !defined(%{static}) JEMALLOC32 = jemalloc JEMALLOC64 = jemalloc QKMALLOC = qkmalloc %else JEMALLOC32 = libjemalloc.a JEMALLOC64 = libjemalloc.a %endif OPT_JCC = -mbranches-within-32B-boundaries OPT_JCC_nextgen = -Wl,-plugin-opt=-x86-branches-within-32B-boundaries #--------- Portability -------------------------------------------------------- intspeed,fpspeed: PORTABILITY = -DSPEC_LP64 600.perlbench_s: CPORTABILITY = -DSPEC_LINUX_X64 621.wrf_s: CPORTABILITY = -DSPEC_CASE_FLAG FPORTABILITY = -convert big_endian 623.xalancbmk_s: CXXPORTABILITY= -DSPEC_LINUX 627.cam4_s: CPORTABILITY= -DSPEC_CASE_FLAG 628.pop2_s: CPORTABILITY = -DSPEC_CASE_FLAG FPORTABILITY = -convert big_endian -assume byterecl #--------- How Many CPUs? ----------------------------------------------------- # Both SPECrate and SPECspeed can test multiple chips / cores / hw threads # - For SPECspeed, you set the number of threads. # See: https://www.spec.org/cpu2017/Docs/system-requirements.html#MultipleCPUs # # q. How many should I set? # a. Unknown, you will have to try it and see! # # To get you started, some suggestions: # # threads - This config file sets a starting point. You could try raising # it. A higher thread count is much more likely to be useful for # fpspeed than for intspeed. # default: %if !defined(%{cores}) %error please add --define cores=[ncores] to runcpu invocation %endif threads = %{cores} # EDIT to change number of OpenMP threads (see above) %ifdef %{smt-on} %define numpeakthreads %{cores} * 2 %endif intspeed: %define numxzthreads %{cores} * 2 %ifdef %{smt-on} threads = %{numxzthreads} %else threads = %{cores} %endif #-------- Tuning Flags ---------------------------------------------- intrate,fprate: #reconsider using a rate config file instead of a speed config file fail=1 intspeed: CC = icc -qnextgen -m64 -std=c11 CXX = icpc -qnextgen -m64 FC = ifort -m64 # Compiler tuning toggle, corresponds with isa_ext preprocessor cfg var SSE = -xCORE-AVX512 EXTRA_FOPTIMIZE = -nostandard-realloc-lhs -align array32byte $(OPT_JCC) LDFLAGS = $(OPT_JCC_nextgen) %if defined(%{noopt}) OPT_ROOT = -O0 %elif defined(%{medopt}) OPT_ROOT = -O2 %else OPT_ROOT = -ipo -O3 -no-prec-div %endif FAST_NO_STATIC = $(SSE) $(OPT_ROOT) FORT_FAST_NO_STATIC = $(SSE) $(OPT_ROOT) FAST = $(SSE) $(OPT_ROOT) -static FORT_FAST = $(SSE) $(OPT_ROOT) -static intspeed_any_c: EXTRA_LIBS = -L$(JEMALLOC64_DIR) -l$(JEMALLOC64) EXTRA_LDFLAGS = -Wl,-z,muldefs intspeed_any_cpp: EXTRA_LIBS = -L$(INTEL64_DIR) -l$(QKMALLOC) EXTRA_LDFLAGS = -Wl,-z,muldefs intspeed=base: %if defined(%{noopt}) OPT_ROOT = -O0 %elif defined(%{medopt}) OPT_ROOT = -O2 %else OPT_ROOT = -O3 -ffast-math -flto -mfpmath=sse -funroll-loops OPT_ROOT_F = -O3 -ipo -no-prec-div %endif FAST_NO_STATIC = $(SSE) $(OPT_ROOT) -fuse-ld=gold FORT_FAST_NO_STATIC = $(SSE) $(OPT_ROOT_F) FAST = $(SSE) $(OPT_ROOT) -static -fuse-ld=gold FORT_FAST = $(SSE) $(OPT_ROOT_F) -static %if !defined(%{static}) COPTIMIZE = $(FAST_NO_STATIC) -qopt-mem-layout-trans=4 -fopenmp -DSPEC_OPENMP CXXOPTIMIZE = $(FAST_NO_STATIC) -qopt-mem-layout-trans=4 FOPTIMIZE = $(FORT_FAST_NO_STATIC) -qopt-mem-layout-trans=4 %if defined(%{noopt}) COPTIMIZE = $(OPT_ROOT) -fopenmp -DSPEC_OPENMP CXXOPTIMIZE = $(OPT_ROOT) FOPTIMIZE = $(OPT_ROOT_F) %endif %else COPTIMIZE = $(FAST) -qopt-mem-layout-trans=4 -fopenmp -DSPEC_OPENMP CXXOPTIMIZE = $(FAST) -qopt-mem-layout-trans=4 FOPTIMIZE = $(FORT_FAST) -qopt-mem-layout-trans=4 %if defined(%{noopt}) COPTIMIZE = $(OPT_ROOT) -static -fopenmp -DSPEC_OPENMP CXXOPTIMIZE = $(OPT_ROOT) -static FOPTIMIZE = $(OPT_ROOT_F) -static %endif %endif intspeed=peak: %if defined(%{noopt}) || defined(%{medopt}) #not building or executing peak against less opt fail=1 %endif OPT_ROOT = -flto -O3 -ffast-math OPT_ROOT_ICC = -ipo -O3 -no-prec-div FAST_NO_STATIC = $(SSE) $(OPT_ROOT) -fuse-ld=gold FAST_NO_STATIC_ICC = $(SSE) $(OPT_ROOT_ICC) COPTIMIZE = $(FAST_NO_STATIC) -qopt-mem-layout-trans=4 CXXOPTIMIZE = $(FAST_NO_STATIC) -qopt-mem-layout-trans=4 PASS1_CFLAGS = -prof-gen PASS2_CFLAGS = -prof-use PASS1_FFLAGS = -prof-gen PASS2_FFLAGS = -prof-use PASS1_CXXFLAGS = -prof-gen PASS2_CXXFLAGS = -prof-use PASS1_LDFLAGS = -prof-gen PASS2_LDFLAGS = -prof-use 600.perlbench_s=peak=default: #[56]00.perlbench[rs] has non standard signed overflow CC = icc LDFLAGS = %undef% FAST_NO_STATIC_ICC = $(SSE) $(OPT_ROOT_ICC) COPTIMIZE = $(FAST_NO_STATIC_ICC) -qopt-mem-layout-trans=4 EXTRA_OPTIMIZE = -fno-strict-overflow EXTRA_COPTIMIZE = $(OPT_JCC) 625.x264_s=peak: feedback = 0 EXTRA_OPTIMIZE = -fno-alias 602.gcc_s=peak: CC = icc -qnextgen -m64 -std=c11 -DSPEC_LP64 -fuse-ld=gold CXX = icpc -qnextgen -m64 -std=c11 -DSPEC_LP64 -fuse-ld=gold FAST_NO_STATIC = $(SSE) $(OPT_ROOT) COPTIMIZE = $(FAST_NO_STATIC) -qopt-mem-layout-trans=4 CXXOPTIMIZE = $(FAST_NO_STATIC) -qopt-mem-layout-trans=4 EXTRA_LIBS = -L$(JEMALLOC64_DIR) -l$(JEMALLOC64) EXTRA_LDFLAGS = -Wl,-z,muldefs PASS1_CFLAGS = -fprofile-generate $(SSE) -flto -Ofast PASS2_CFLAGS = -fprofile-use=default.profdata PASS1_FFLAGS = -fprofile-generate $(SSE) -flto -Ofast PASS2_FFLAGS = -fprofile-use=default.profdata PASS1_CXXFLAGS = -fprofile-generate $(SSE) -flto -Ofast PASS2_CXXFLAGS = -fprofile-use=default.profdata PASS1_LDFLAGS = -fprofile-generate $(SSE) -flto -Ofast PASS2_LDFLAGS = -fprofile-use=default.profdata fdo_run1 = $command ; llvm-profdata merge -output=default.profdata *.profraw 605.mcf_s,620.omnetpp_s,623.xalancbmk_s,631.deepsjeng_s,648.exchange2_s,641.leela_s,657.xz_s=peak: basepeak=1 fpspeed: CC = icc -m64 -std=c11 CXX = icpc -m64 FC = ifort -m64 # Compiler tuning toggle, corresponds with isa_ext preprocessor cfg var SSE = -xCORE-AVX512 EXTRA_FOPTIMIZE = -nostandard-realloc-lhs $(OPT_JCC) EXTRA_COPTIMIZE = $(OPT_JCC) EXTRA_CXXOPTIMIZE = $(OPT_JCC) fpspeed_any_fortran: EXTRA_LIBS = -L$(JEMALLOC64_DIR) -l$(JEMALLOC64) EXTRA_LDFLAGS = -Wl,-z,muldefs fpspeed=base=default: %if defined(%{noopt}) OPT_ROOT = -O0 %elif defined(%{medopt}) OPT_ROOT = -O2 %else OPT_ROOT = -ipo -O3 -no-prec-div %endif FAST_NO_STATIC = $(SSE) $(OPT_ROOT) FORT_FAST_NO_STATIC = $(SSE) $(OPT_ROOT) FAST = $(SSE) $(OPT_ROOT) -static FORT_FAST = $(SSE) $(OPT_ROOT) -static %if !defined(%{static}) COPTIMIZE = $(FAST_NO_STATIC) -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -qopenmp -DSPEC_OPENMP CXXOPTIMIZE = $(FAST_NO_STATIC) -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -qopenmp -DSPEC_OPENMP FOPTIMIZE = $(FORT_FAST_NO_STATIC) -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -qopenmp -DSPEC_OPENMP %if defined(%{noopt}) COPTIMIZE = $(OPT_ROOT) -qopenmp -DSPEC_OPENMP CXXOPTIMIZE = $(OPT_ROOT) -qopenmp -DSPEC_OPENMP FOPTIMIZE = $(OPT_ROOT) -qopenmp -DSPEC_OPENMP %endif %else COPTIMIZE = $(FAST) -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -qopenmp -DSPEC_OPENMP CXXOPTIMIZE = $(FAST) -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -qopenmp -DSPEC_OPENMP FOPTIMIZE = $(FORT_FAST) -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -qopenmp -DSPEC_OPENMP %if defined(%{noopt}) COPTIMIZE = $(OPT_ROOT) -qopenmp -DSPEC_OPENMP -static CXXOPTIMIZE = $(OPT_ROOT) -qopenmp -DSPEC_OPENMP -static FOPTIMIZE = $(OPT_ROOT) -qopenmp -DSPEC_OPENMP -static %endif %endif fpspeed=peak: %if defined(%{noopt}) || defined(%{medopt}) #not building or executing peak against less opt fail=1 %endif PASS1_CFLAGS = -prof-gen PASS2_CFLAGS = -prof-use PASS1_FFLAGS = -prof-gen PASS2_FFLAGS = -prof-use PASS1_CXXFLAGS = -prof-gen PASS2_CXXFLAGS = -prof-use PASS1_LDFLAGS = -prof-gen PASS2_LDFLAGS = -prof-use OPT_ROOT = -ipo -O3 -no-prec-div FAST_NO_STATIC = $(SSE) $(OPT_ROOT) FORT_FAST_NO_STATIC = $(SSE) $(OPT_ROOT) FAST = $(SSE) $(OPT_ROOT) -static FORT_FAST = $(SSE) $(OPT_ROOT) -static FAST_NO_STATIC_PASS1 = $(OPT_ROOT) FORT_FAST_NO_STATIC_PASS1 = $(OPT_ROOT) FAST_PASS1 = $(OPT_ROOT) -static FORT_FAST_PASS1 = $(OPT_ROOT) -static FAST_NO_STATIC_PASS2 = $(SSE) $(OPT_ROOT) FORT_FAST_NO_STATIC_PASS2 = $(SSE) $(OPT_ROOT) FAST_PASS2 = $(SSE) $(OPT_ROOT) -static FORT_FAST_PASS2 = $(SSE) $(OPT_ROOT) -static %if !defined(%{static}) PASS1_COPTIMIZE = $(FAST_NO_STATIC_PASS1) -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -DSPEC_SUPPRESS_OPENMP PASS1_CXXOPTIMIZE = $(FAST_NO_STATIC_PASS1) -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -DSPEC_SUPPRESS_OPENMP PASS1_FOPTIMIZE = $(FORT_FAST_NO_STATIC_PASS1) -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -DSPEC_SUPPRESS_OPENMP PASS2_COPTIMIZE = $(FAST_NO_STATIC_PASS2) -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -qopenmp -DSPEC_OPENMP PASS2_CXXOPTIMIZE = $(FAST_NO_STATIC_PASS2) -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -qopenmp -DSPEC_OPENMP PASS2_FOPTIMIZE = $(FORT_FAST_NO_STATIC_PASS2) -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -qopenmp -DSPEC_OPENMP %else PASS1_COPTIMIZE = $(FAST_PASS1) -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -DSPEC_SUPPRESS_OPENMP PASS1_CXXOPTIMIZE = $(FAST_PASS1) -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -DSPEC_SUPPRESS_OPENMP PASS1_FOPTIMIZE = $(FORT_FAST_PASS1) -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -DSPEC_SUPPRESS_OPENMP PASS2_COPTIMIZE = $(FAST_PASS2) -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -qopenmp -DSPEC_OPENMP PASS2_CXXOPTIMIZE = $(FAST_PASS2) -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -qopenmp -DSPEC_OPENMP PASS2_FOPTIMIZE = $(FORT_FAST_PASS2) -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -qopenmp -DSPEC_OPENMP %endif #some benchmarks do not mind sharing cores %ifdef %{smt-on} 628.pop2_s,644.nab_s=peak: threads = %{numpeakthreads} %endif #fp no FDO 607.cactuBSSN_s,619.lbm_s,627.cam4_s,628.pop2_s,638.imagick_s,654.roms_s=peak: basepeak=1 644.nab_s=peak: feedback = 0 EXTRA_LIBS = -L$(JEMALLOC64_DIR) -l$(JEMALLOC64) EXTRA_LDFLAGS = -Wl,-z,muldefs %if !defined(%{static}) COPTIMIZE = $(FAST_NO_STATIC) -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -qopenmp -DSPEC_OPENMP CXXOPTIMIZE = $(FAST_NO_STATIC) -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -qopenmp -DSPEC_OPENMP FOPTIMIZE = $(FORT_FAST_NO_STATIC) -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -qopenmp -DSPEC_OPENMP %if defined(%{noopt}) COPTIMIZE = $(OPT_ROOT) -qopenmp -DSPEC_OPENMP CXXOPTIMIZE = $(OPT_ROOT) -qopenmp -DSPEC_OPENMP FOPTIMIZE = $(OPT_ROOT) -qopenmp -DSPEC_OPENMP %endif %else COPTIMIZE = $(FAST) -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -qopenmp -DSPEC_OPENMP CXXOPTIMIZE = $(FAST) -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -qopenmp -DSPEC_OPENMP FOPTIMIZE = $(FORT_FAST) -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -qopenmp -DSPEC_OPENMP %if defined(%{noopt}) COPTIMIZE = $(OPT_ROOT) -qopenmp -DSPEC_OPENMP -static CXXOPTIMIZE = $(OPT_ROOT) -qopenmp -DSPEC_OPENMP -static FOPTIMIZE = $(OPT_ROOT) -qopenmp -DSPEC_OPENMP -static %endif %endif #------------------------------------------------------------------------------- # Tester and System Descriptions - EDIT the sections below #------------------------------------------------------------------------------- # For info about any field, see # https://www.spec.org/auto/cpu2017/Docs/config.html#fieldname # Example: https://www.spec.org/auto/cpu2017/Docs/config.html#hw_memory #------------------------------------------------------------------------------- #--------- If you install new compilers, EDIT this section -------------------- intrate,intspeed,fpspeed,fprate: sw_compiler000 = C/C++: Version 19.1.1.217 of Intel C/C++ Compiler sw_compiler001 = for Linux Build 20200306; sw_compiler002 = Fortran: Version 19.1.1.217 of Intel Fortran sw_compiler003 = Compiler for Linux Build 20200306; sw_base_ptrsize = 64-bit sw_other = jemalloc memory allocator V5.0.1 power_management000= BIOS set to prefer performance at power_management001 = the cost of additional power usage fprate,fpspeed: sw_peak_ptrsize = 64-bit intspeed: sw_peak_ptrsize = 64-bit intrate: sw_peak_ptrsize = 32/64-bit # To understand the difference between hw_vendor/sponsor/tester, see: # cd %SPEC%/config # copy this.cfg that.cfg # (2) Change items that are marked 'EDIT' (search for it) # # If you have different software or hardware, this config file may not work. # You may find a better config file for your system next to posted results: # http://www.spec.org/cpu2017/results # # Compiler issues: Contact your compiler vendor, not SPEC. # For SPEC help: http://www.spec.org/auto/cpu2017/Docs/techsupport.html #------------------------------------------------------------------------------ # www.spec.org/auto/cpu2017/Docs/config.html#test_sponsor intrate,intspeed,fprate,fpspeed: # Important: keep this line hw_vendor = Tyrone Systems tester = Tyrone Systems test_sponsor = Netweb Pte Ltd license_num = 006042 prepared_by = Tyrone Systems #--------- EDIT system availability dates and system information ---------------------------------------------- intrate,intspeed,fprate,fpspeed: # Important: keep this line # Example # Brief info about field hw_avail = Aug-2020 sw_avail = Jun-2020 hw_cpu_nominal_mhz = 2300 hw_cpu_max_mhz = 3700 hw_ncores = 36 hw_nthreadspercore = 2 # number threads enabled per core hw_ncpuorder = 1,2 (chip)s # Ordering options hw_model000 = Tyrone Camarero DS400TOG-424RT2 # system model name hw_model001 = (2.30 GHz,Intel Xeon Gold 6140) # sw_other = # TurboHeap Library V8.1 # Other perf-relevant sw, or "None" hw_pcache = 32 KB I + 32 KB D on chip per core # Primary cache size, type, location hw_scache = 1 MB I+D on chip per core # Second cache or "None" hw_tcache = 24.75 MB I+D on chip per chip hw_ocache = None # hw_ocache = # 9 GB I+D off chip per system board # Other cache or "None" hw_memory000 = 384 GB (12 x 32 GB 2Rx4 PC4-2933Y-R, hw_memory001 = running at 2666) #--------- Sysinfo fields - You may need to adjust this section --------------- # Note: Some commented-out fields above are automatically set to preliminary # values by sysinfo # www.spec.org/auto/cpu2017/Docs/config.html#sysinfo # Uncomment lines for which you already have a better answer than sysinfo # intrate,intspeed,fprate,fpspeed: # Important: keep this line # Example # Brief info about field # hw_cpu_name = # Intel Xeon E9-9999 v9 # chip name hw_disk = 1 x 480 GB SATA SSD # Size, type, other perf-relevant info hw_other = None # hw_nchips = # 99 # number chips enabled fw_bios = Version 3.3 released Feb-2020 sw_file = xfs # File system sw_state = Run level 3 (multi-user) # Software state. # sw_os001 = # Linux Sailboat # Operating system # sw_os002 = # Distribution 7.2 SP1 # and version #--------- EDIT Intel Recommended Fields - You may wish to adjust this section ----- default: notes_000 = Binaries compiled on a system with 2x Intel Cascade Lake CPU 4214R + 384GB RAM notes_005 = memory using Centos 8.2 x86_64 intspeed: notes_jemalloc_003 = jemalloc, a general purpose malloc implementation notes_jemalloc_004 = built with the Centos 8.2 x86_64, and the system compiler gcc 8.3.1 notes_jemalloc_005 = sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases default: notes_os_000 = Stack size set to unlimited using "ulimit -s unlimited" #Ease of tagging results from the runcpu command line with commands run outside of runcpu harneess #Adjust as necessary for your SUT %if defined(%{THP_enabled}) notes_200 = Transparent Huge Pages enabled with: notes_201 = echo always > /sys/kernel/mm/transparent_hugepage/enabled %elif defined(%{THP_disabled}) notes_200 = Transparent Huge Pages disabled with: notes_201 = echo never > /sys/kernel/mm/transparent_hugepage/enabled %else notes_010 = Transparent Huge Pages enabled by default %endif %ifdef %{drop_caches} notes_015 = Prior to runcpu invocation notes_020 = Filesystem page cache synced and cleared with: notes_025 = sync; echo 3> /proc/sys/vm/drop_caches notes_030 = runcpu command invoked through numactl i.e.: notes_035 = numactl --interleave=all runcpu notes_040 = Yes: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) notes_045 = is mitigated in the system as tested and documented. notes_050 = Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) notes_055 = is mitigated in the system as tested and documented. notes_060 = Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) notes_065 = is mitigated in the system as tested and documented. %endif %ifdef %{invoke_with_interleave} notes_205 = runcpu command invoked through numactl i.e.: notes_206 = numactl --interleave=all runcpu %endif intrate,fprate: %if defined(%{no-numa}) notes_submit_000 = The taskset mechanism was used to bind copies to processors. The config file option 'submit' notes_submit_001 = was used to generate taskset commands to bind each copy to a specific processor. notes_submit_002 = For details, please see the config file. %else notes_submit_000 = The numactl mechanism was used to bind copies to processors. The config file option 'submit' notes_submit_001 = was used to generate numactl commands to bind each copy to a specific processor. notes_submit_002 = For details, please see the config file. %endif # The following settings were obtained by running the sysinfo_program # 'specperl $[top]/bin/sysinfo' (sysinfo:SHA:60a26e139a7df7ba5521c983304469c762a79f3394ac112dddae4bac7d1a4f55) default: notes_plat_sysinfo_000 = notes_plat_sysinfo_005 = Sysinfo program /home/cpu2017/bin/sysinfo notes_plat_sysinfo_010 = Rev: r6538 of 2020-09-24 e8664e66d2d7080afeaa89d4b38e2f1c notes_plat_sysinfo_015 = running on localhost.localdomain Sat Feb 20 20:10:43 2021 notes_plat_sysinfo_020 = notes_plat_sysinfo_025 = SUT (System Under Test) info as seen by some common utilities. notes_plat_sysinfo_030 = For more information on this section, see notes_plat_sysinfo_035 = https://www.spec.org/cpu2017/Docs/config.html#sysinfo notes_plat_sysinfo_040 = notes_plat_sysinfo_045 = From /proc/cpuinfo notes_plat_sysinfo_050 = model name : Intel(R) Xeon(R) Gold 6140 CPU @ 2.30GHz notes_plat_sysinfo_055 = 2 "physical id"s (chips) notes_plat_sysinfo_060 = 72 "processors" notes_plat_sysinfo_065 = cores, siblings (Caution: counting these is hw and system dependent. The following notes_plat_sysinfo_070 = excerpts from /proc/cpuinfo might not be reliable. Use with caution.) notes_plat_sysinfo_075 = cpu cores : 18 notes_plat_sysinfo_080 = siblings : 36 notes_plat_sysinfo_085 = physical 0: cores 0 1 2 3 4 8 9 10 11 16 17 18 19 20 24 25 26 27 notes_plat_sysinfo_090 = physical 1: cores 0 1 2 3 4 8 9 10 11 16 17 18 19 20 24 25 26 27 notes_plat_sysinfo_095 = notes_plat_sysinfo_100 = From lscpu: notes_plat_sysinfo_105 = Architecture: x86_64 notes_plat_sysinfo_110 = CPU op-mode(s): 32-bit, 64-bit notes_plat_sysinfo_115 = Byte Order: Little Endian notes_plat_sysinfo_120 = CPU(s): 72 notes_plat_sysinfo_125 = On-line CPU(s) list: 0-71 notes_plat_sysinfo_130 = Thread(s) per core: 2 notes_plat_sysinfo_135 = Core(s) per socket: 18 notes_plat_sysinfo_140 = Socket(s): 2 notes_plat_sysinfo_145 = NUMA node(s): 4 notes_plat_sysinfo_150 = Vendor ID: GenuineIntel notes_plat_sysinfo_155 = CPU family: 6 notes_plat_sysinfo_160 = Model: 85 notes_plat_sysinfo_165 = Model name: Intel(R) Xeon(R) Gold 6140 CPU @ 2.30GHz notes_plat_sysinfo_170 = Stepping: 4 notes_plat_sysinfo_175 = CPU MHz: 2075.916 notes_plat_sysinfo_180 = CPU max MHz: 3700.0000 notes_plat_sysinfo_185 = CPU min MHz: 1000.0000 notes_plat_sysinfo_190 = BogoMIPS: 4600.00 notes_plat_sysinfo_195 = Virtualization: VT-x notes_plat_sysinfo_200 = L1d cache: 32K notes_plat_sysinfo_205 = L1i cache: 32K notes_plat_sysinfo_210 = L2 cache: 1024K notes_plat_sysinfo_215 = L3 cache: 25344K notes_plat_sysinfo_220 = NUMA node0 CPU(s): 0-2,5,6,9,10,14,15,36-38,41,42,45,46,50,51 notes_plat_sysinfo_225 = NUMA node1 CPU(s): 3,4,7,8,11-13,16,17,39,40,43,44,47-49,52,53 notes_plat_sysinfo_230 = NUMA node2 CPU(s): 18-20,23,24,27,28,32,33,54-56,59,60,63,64,68,69 notes_plat_sysinfo_235 = NUMA node3 CPU(s): 21,22,25,26,29-31,34,35,57,58,61,62,65-67,70,71 notes_plat_sysinfo_240 = Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov notes_plat_sysinfo_245 = pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp notes_plat_sysinfo_250 = lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid notes_plat_sysinfo_255 = aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 notes_plat_sysinfo_260 = xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave notes_plat_sysinfo_265 = avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cdp_l3 notes_plat_sysinfo_270 = invpcid_single pti intel_ppin ssbd mba ibrs ibpb stibp tpr_shadow vnmi flexpriority notes_plat_sysinfo_275 = ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx rdt_a notes_plat_sysinfo_280 = avx512f avx512dq rdseed adx smap clflushopt clwb intel_pt avx512cd avx512bw avx512vl notes_plat_sysinfo_285 = xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local notes_plat_sysinfo_290 = dtherm ida arat pln pts pku ospke md_clear flush_l1d notes_plat_sysinfo_295 = notes_plat_sysinfo_300 = /proc/cpuinfo cache data notes_plat_sysinfo_305 = cache size : 25344 KB notes_plat_sysinfo_310 = notes_plat_sysinfo_315 = From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a notes_plat_sysinfo_320 = physical chip. notes_plat_sysinfo_325 = available: 4 nodes (0-3) notes_plat_sysinfo_330 = node 0 cpus: 0 1 2 5 6 9 10 14 15 36 37 38 41 42 45 46 50 51 notes_plat_sysinfo_335 = node 0 size: 95353 MB notes_plat_sysinfo_340 = node 0 free: 82300 MB notes_plat_sysinfo_345 = node 1 cpus: 3 4 7 8 11 12 13 16 17 39 40 43 44 47 48 49 52 53 notes_plat_sysinfo_350 = node 1 size: 96736 MB notes_plat_sysinfo_355 = node 1 free: 78695 MB notes_plat_sysinfo_360 = node 2 cpus: 18 19 20 23 24 27 28 32 33 54 55 56 59 60 63 64 68 69 notes_plat_sysinfo_365 = node 2 size: 96763 MB notes_plat_sysinfo_370 = node 2 free: 85025 MB notes_plat_sysinfo_375 = node 3 cpus: 21 22 25 26 29 30 31 34 35 57 58 61 62 65 66 67 70 71 notes_plat_sysinfo_380 = node 3 size: 96763 MB notes_plat_sysinfo_385 = node 3 free: 85530 MB notes_plat_sysinfo_390 = node distances: notes_plat_sysinfo_395 = node 0 1 2 3 notes_plat_sysinfo_400 = 0: 10 11 21 21 notes_plat_sysinfo_405 = 1: 11 10 21 21 notes_plat_sysinfo_410 = 2: 21 21 10 11 notes_plat_sysinfo_415 = 3: 21 21 11 10 notes_plat_sysinfo_420 = notes_plat_sysinfo_425 = From /proc/meminfo notes_plat_sysinfo_430 = MemTotal: 394872264 kB notes_plat_sysinfo_435 = HugePages_Total: 0 notes_plat_sysinfo_440 = Hugepagesize: 2048 kB notes_plat_sysinfo_445 = notes_plat_sysinfo_450 = /sbin/tuned-adm active notes_plat_sysinfo_455 = Current active profile: throughput-performance notes_plat_sysinfo_460 = notes_plat_sysinfo_465 = /sys/devices/system/cpu/cpu*/cpufreq/scaling_governor has notes_plat_sysinfo_470 = performance notes_plat_sysinfo_475 = notes_plat_sysinfo_480 = From /etc/*release* /etc/*version* notes_plat_sysinfo_485 = centos-release: CentOS Linux release 8.2.2004 (Core) notes_plat_sysinfo_490 = centos-release-upstream: Derived from Red Hat Enterprise Linux 8.2 (Source) notes_plat_sysinfo_495 = os-release: notes_plat_sysinfo_500 = NAME="CentOS Linux" notes_plat_sysinfo_505 = VERSION="8 (Core)" notes_plat_sysinfo_510 = ID="centos" notes_plat_sysinfo_515 = ID_LIKE="rhel fedora" notes_plat_sysinfo_520 = VERSION_ID="8" notes_plat_sysinfo_525 = PLATFORM_ID="platform:el8" notes_plat_sysinfo_530 = PRETTY_NAME="CentOS Linux 8 (Core)" notes_plat_sysinfo_535 = ANSI_COLOR="0;31" notes_plat_sysinfo_540 = redhat-release: CentOS Linux release 8.2.2004 (Core) notes_plat_sysinfo_545 = system-release: CentOS Linux release 8.2.2004 (Core) notes_plat_sysinfo_550 = system-release-cpe: cpe:/o:centos:centos:8 notes_plat_sysinfo_555 = notes_plat_sysinfo_560 = uname -a: notes_plat_sysinfo_565 = Linux localhost.localdomain 4.18.0-193.el8.x86_64 #1 SMP Fri May 8 10:59:10 UTC 2020 notes_plat_sysinfo_570 = x86_64 x86_64 x86_64 GNU/Linux notes_plat_sysinfo_575 = notes_plat_sysinfo_580 = Kernel self-reported vulnerability status: notes_plat_sysinfo_585 = notes_plat_sysinfo_590 = CVE-2018-12207 (iTLB Multihit): KVM: Vulnerable notes_plat_sysinfo_595 = CVE-2018-3620 (L1 Terminal Fault): Mitigation: PTE Inversion notes_plat_sysinfo_600 = Microarchitectural Data Sampling: Mitigation: Clear CPU buffers; SMT notes_plat_sysinfo_605 = vulnerable notes_plat_sysinfo_610 = CVE-2017-5754 (Meltdown): Mitigation: PTI notes_plat_sysinfo_615 = CVE-2018-3639 (Speculative Store Bypass): Mitigation: Speculative Store notes_plat_sysinfo_620 = Bypass disabled via prctl and notes_plat_sysinfo_625 = seccomp notes_plat_sysinfo_630 = CVE-2017-5753 (Spectre variant 1): Mitigation: usercopy/swapgs notes_plat_sysinfo_635 = barriers and __user pointer notes_plat_sysinfo_640 = sanitization notes_plat_sysinfo_645 = CVE-2017-5715 (Spectre variant 2): Mitigation: Full generic notes_plat_sysinfo_650 = retpoline, IBPB: conditional, notes_plat_sysinfo_655 = IBRS_FW, STIBP: conditional, RSB notes_plat_sysinfo_660 = filling notes_plat_sysinfo_665 = CVE-2020-0543 (Special Register Buffer Data Sampling): No status reported notes_plat_sysinfo_670 = CVE-2019-11135 (TSX Asynchronous Abort): Mitigation: Clear CPU buffers; SMT notes_plat_sysinfo_675 = vulnerable notes_plat_sysinfo_680 = notes_plat_sysinfo_685 = run-level 3 Feb 19 10:35 notes_plat_sysinfo_690 = notes_plat_sysinfo_695 = SPEC is set to: /home/cpu2017 notes_plat_sysinfo_700 = Filesystem Type Size Used Avail Use% Mounted on notes_plat_sysinfo_705 = /dev/mapper/cl-home xfs 392G 145G 248G 37% /home notes_plat_sysinfo_710 = notes_plat_sysinfo_715 = From /sys/devices/virtual/dmi/id notes_plat_sysinfo_720 = Vendor: Tyrone Systems notes_plat_sysinfo_725 = Product: Tyrone Camarero DS400TOG-424RT2 notes_plat_sysinfo_730 = Product Family: SMC X11 notes_plat_sysinfo_735 = Serial: A309085X0907231 notes_plat_sysinfo_740 = notes_plat_sysinfo_745 = Additional information from dmidecode follows. WARNING: Use caution when you interpret notes_plat_sysinfo_750 = this section. The 'dmidecode' program reads system data which is "intended to allow notes_plat_sysinfo_755 = hardware to be accurately determined", but the intent may not be met, as there are notes_plat_sysinfo_760 = frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. notes_plat_sysinfo_765 = Memory: notes_plat_sysinfo_770 = 12x NO DIMM NO DIMM notes_plat_sysinfo_775 = 12x Samsung M393A4K40CB2-CVF 32 GB 2 rank 2933, configured at 2666 notes_plat_sysinfo_780 = notes_plat_sysinfo_785 = BIOS: notes_plat_sysinfo_790 = BIOS Vendor: American Megatrends Inc. notes_plat_sysinfo_795 = BIOS Version: 3.3 notes_plat_sysinfo_800 = BIOS Date: 02/21/2020 notes_plat_sysinfo_805 = BIOS Revision: 5.14 notes_plat_sysinfo_810 = notes_plat_sysinfo_815 = (End of data from sysinfo program) hw_cpu_name = Intel Xeon Gold 6140 hw_disk = 392 GB add more disk info here hw_memory001 = 376.580 GB fixme: If using DDR4, the format is: hw_nchips = 2 prepared_by = root (is never output, only tags rawfile) sw_file = xfs sw_os000 = CentOS Linux release 8.2.2004 (Core) sw_os001 = 4.18.0-193.el8.x86_64 sw_state = Run level 3 (add definition here) # End of settings added by sysinfo_program # The following section was added automatically, and contains settings that # did not appear in the original configuration file, but were added to the # raw file after the run. default: notes_plat_000 =BIOS Settings: notes_plat_005 =Power Technology = Custom notes_plat_010 =Power Performance Tuning = BIOS Controls EPB notes_plat_015 =ENERGY_PERF_BIAS_CFG mode = Maximum Performance notes_plat_020 =SNC = Enable notes_plat_025 =Stale AtoS = Disable notes_plat_030 =IMC Interleaving = 1-way Interleave notes_plat_035 =Patrol Scrub = Disable notes_jemalloc_000 = jemalloc, a general purpose malloc implementation notes_jemalloc_005 = built with the Centos 8.2 x86_64, and the system compiler gcc 4.8.5 notes_jemalloc_010 = sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases