SPEC CPU®2017 Floating Point Speed Result

Copyright 2017-2020 Standard Performance Evaluation Corporation

NEC Corporation

Express5800/R120h-1M (Intel Xeon Silver 4216)

SPECspeed®2017_fp_base = 11300

SPECspeed®2017_fp_peak = 11400

CPU2017 License: 9006 Test Date: Jun-2020
Test Sponsor: NEC Corporation Hardware Availability: Dec-2019
Tested by: NEC Corporation Software Availability: Sep-2019

Benchmark result graphs are available in the PDF report.

Hardware
CPU Name: Intel Xeon Silver 4216
  Max MHz: 3200
  Nominal: 2100
Enabled: 32 cores, 2 chips
Orderable: 1,2 chips
Cache L1: 32 KB I + 32 KB D on chip per core
  L2: 1 MB I+D on chip per core
  L3: 22 MB I+D on chip per chip
  Other: None
Memory: 384 GB (24 x 16 GB 2Rx8 PC4-2933Y-R,
running at 2400)
Storage: 1 x 1 TB SATA, 7200 RPM, RAID 0
Other: None
Software
OS: Red Hat Enterprise Linux Server release 7.7
(Maipo)
Kernel 3.10.0-1062.1.1.el7.x86_64
Compiler: C/C++: Version 19.0.4.227 of Intel C/C++
Compiler Build 20190416 for Linux;
Fortran: Version 19.0.4.227 of Intel Fortran
Compiler Build 20190416 for Linux
Parallel: Yes
Firmware: NEC BIOS Version U32 v2.22 11/13/2019 released
Mar-2020
File System: ext4
System State: Run level 3 (multi-user)
Base Pointers: 64-bit
Peak Pointers: 64-bit
Other: None
Power Management: BIOS set to prefer performance at the cost of
additional power usage.

Results Table

Benchmark Base Peak
Threads Seconds Ratio Seconds Ratio Seconds Ratio Threads Seconds Ratio Seconds Ratio Seconds Ratio
SPECspeed®2017_fp_base 11300
SPECspeed®2017_fp_peak 11400
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
603.bwaves_s 32 1350 4360 1360 4340 1350 4360 32 1350 4360 1360 4340 1350 4360
607.cactuBSSN_s 32 1350 1230 1340 1250 1340 1240 32 1350 1240 1340 1240 1350 1240
619.lbm_s 32 62.2 84.2 61.4 85.2 61.2 85.6 32 61.3 85.5 61.2 85.6 61.3 85.5
621.wrf_s 32 1220 1080 1230 1080 1220 1090 32 1140 1160 1140 1160 1140 1160
627.cam4_s 32 1260 70.2 1260 70.4 1260 70.2 32 1260 70.2 1260 70.2 1260 70.1
628.pop2_s 32 1910 62.3 1900 62.5 1900 62.6 32 1870 63.3 1860 64.0 1890 62.9
638.imagick_s 32 1580 91.4 1580 91.3 1580 91.6 32 1570 91.7 1650 87.2 1580 91.4
644.nab_s 32 1070 1630 1070 1630 1070 1630 32 1070 1630 1070 1630 1070 1630
649.fotonik3d_s 32 1230 74.4 1220 74.8 1240 73.8 32 1220 74.6 1230 74.0 1220 74.9
654.roms_s 32 1140 1380 1150 1370 1140 1390 32 1140 1380 1150 1370 1140 1390

Operating System Notes

 Stack size set to unlimited using "ulimit -s unlimited"

Environment Variables Notes

Environment variables set by runcpu before the start of the run:
KMP_AFFINITY = "granularity=fine,compact"
LD_LIBRARY_PATH = "/home/cpu2017/lib/intel64"
OMP_STACKSIZE = "192M"

General Notes

 Binaries compiled on a system with 1x Intel Core i9-7900X CPU + 32GB RAM
 memory using Redhat Enterprise Linux 7.5
 Transparent Huge Pages enabled by default
 Prior to runcpu invocation
 Filesystem page cache synced and cleared with:
 sync; echo 3 >       /proc/sys/vm/drop_caches

 NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown)
 is mitigated in the system as tested and documented.
 Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1)
 is mitigated in the system as tested and documented.
 Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2)
 is mitigated in the system as tested and documented.

Platform Notes

 BIOS Settings:
  Thermal Configuration: Maximum Cooling
  Workload Profile: General Peak Frequency Compute
  Intel Hyper-Threading: Disabled
  Memory Patrol Scrubbing: Disabled
  LLC Dead Line Allocation: Disabled
  LLC Prefetch: Enabled
  Enhanced Processor Performance: Enabled
  Workload Profile: Custom
   Advanced Memory Protection: Advanced ECC Support
   NUMA Group Size Optimization: Flat

 Sysinfo program /home/cpu2017/bin/sysinfo
 Rev: r6365 of 2019-08-21 295195f888a3d7edb1e6e46a485a0011
 running on r120h1m Sun Jun 21 06:46:23 2020

 SUT (System Under Test) info as seen by some common utilities.
 For more information on this section, see
    https://www.spec.org/cpu2017/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : Intel(R) Xeon(R) Silver 4216 CPU @ 2.10GHz
       2  "physical id"s (chips)
       32 "processors"
    cores, siblings (Caution: counting these is hw and system dependent. The following
    excerpts from /proc/cpuinfo might not be reliable.  Use with caution.)
       cpu cores : 16
       siblings  : 16
       physical 0: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
       physical 1: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

 From lscpu:
      Architecture:          x86_64
      CPU op-mode(s):        32-bit, 64-bit
      Byte Order:            Little Endian
      CPU(s):                32
      On-line CPU(s) list:   0-31
      Thread(s) per core:    1
      Core(s) per socket:    16
      Socket(s):             2
      NUMA node(s):          2
      Vendor ID:             GenuineIntel
      CPU family:            6
      Model:                 85
      Model name:            Intel(R) Xeon(R) Silver 4216 CPU @ 2.10GHz
      Stepping:              6
      CPU MHz:               2100.000
      BogoMIPS:              4200.00
      Virtualization:        VT-x
      L1d cache:             32K
      L1i cache:             32K
      L2 cache:              1024K
      L3 cache:              22528K
      NUMA node0 CPU(s):     0-15
      NUMA node1 CPU(s):     16-31
      Flags:                 fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
      pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp
      lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc
      aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg
      fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes
      xsave avx f16c rdrand lahf_lm abm 3dnowprefetch epb cat_l3 cdp_l3 invpcid_single
      intel_ppin intel_pt ssbd mba ibrs ibpb stibp ibrs_enhanced tpr_shadow vnmi
      flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm
      cqm mpx rdt_a avx512f avx512dq rdseed adx smap clflushopt clwb avx512cd avx512bw
      avx512vl xsaveopt xsavec xgetbv1 cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local
      dtherm ida arat pln pts pku ospke avx512_vnni md_clear spec_ctrl intel_stibp
      flush_l1d arch_capabilities

 /proc/cpuinfo cache data
    cache size : 22528 KB

 From numactl --hardware  WARNING: a numactl 'node' might or might not correspond to a
 physical chip.
   available: 2 nodes (0-1)
   node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
   node 0 size: 196265 MB
   node 0 free: 191619 MB
   node 1 cpus: 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
   node 1 size: 196607 MB
   node 1 free: 192113 MB
   node distances:
   node   0   1
     0:  10  21
     1:  21  10

 From /proc/meminfo
    MemTotal:       395924620 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 From /etc/*release* /etc/*version*
    os-release:
       NAME="Red Hat Enterprise Linux Server"
       VERSION="7.7 (Maipo)"
       ID="rhel"
       ID_LIKE="fedora"
       VARIANT="Server"
       VARIANT_ID="server"
       VERSION_ID="7.7"
       PRETTY_NAME="Red Hat Enterprise Linux Server 7.7 (Maipo)"
    redhat-release: Red Hat Enterprise Linux Server release 7.7 (Maipo)
    system-release: Red Hat Enterprise Linux Server release 7.7 (Maipo)
    system-release-cpe: cpe:/o:redhat:enterprise_linux:7.7:ga:server

 uname -a:
    Linux r120h1m 3.10.0-1062.1.1.el7.x86_64 #1 SMP Tue Aug 13 18:39:59 UTC 2019 x86_64
    x86_64 x86_64 GNU/Linux

 Kernel self-reported vulnerability status:

 CVE-2018-3620 (L1 Terminal Fault):        Not affected
 Microarchitectural Data Sampling:         Not affected
 CVE-2017-5754 (Meltdown):                 Not affected
 CVE-2018-3639 (Speculative Store Bypass): Mitigation: Speculative Store Bypass disabled
                                           via prctl and seccomp
 CVE-2017-5753 (Spectre variant 1):        Mitigation: Load fences, usercopy/swapgs
                                           barriers and __user pointer sanitization
 CVE-2017-5715 (Spectre variant 2):        Mitigation: Full retpoline, IBPB

 run-level 3 Jun 21 06:40

 SPEC is set to: /home/cpu2017
    Filesystem     Type  Size  Used Avail Use% Mounted on
    /dev/sda3      ext4  908G  155G  708G  18% /

 From /sys/devices/virtual/dmi/id
     BIOS:    NEC U32 11/13/2019
     Vendor:  NEC
     Product: Express5800/R120h-1M
     Serial:  JPN0084094

 Additional information from dmidecode follows.  WARNING: Use caution when you interpret
 this section. The 'dmidecode' program reads system data which is "intended to allow
 hardware to be accurately determined", but the intent may not be met, as there are
 frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard.
   Memory:
     24x HPE P03050-091 16 GB 2 rank 2933

 (End of data from sysinfo program)
Regarding the sysinfo display about the memory speed, the correct configured
memory speed is 2400 MT/s. The dmidecode description should be as follows:
24x HPE P03050-091 16 GB 2 rank 2933, configured at 2400

Compiler Version Notes

==============================================================================
C               | 619.lbm_s(base, peak) 638.imagick_s(base, peak)
                | 644.nab_s(base, peak)
------------------------------------------------------------------------------
Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64,
  Version 19.0.4.227 Build 20190416
Copyright (C) 1985-2019 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C, Fortran | 607.cactuBSSN_s(base, peak)
------------------------------------------------------------------------------
Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64,
  Version 19.0.4.227 Build 20190416
Copyright (C) 1985-2019 Intel Corporation.  All rights reserved.
Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64,
  Version 19.0.4.227 Build 20190416
Copyright (C) 1985-2019 Intel Corporation.  All rights reserved.
Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R)
  64, Version 19.0.4.227 Build 20190416
Copyright (C) 1985-2019 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
Fortran         | 603.bwaves_s(base, peak) 649.fotonik3d_s(base, peak)
                | 654.roms_s(base, peak)
------------------------------------------------------------------------------
Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R)
  64, Version 19.0.4.227 Build 20190416
Copyright (C) 1985-2019 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
Fortran, C      | 621.wrf_s(base, peak) 627.cam4_s(base, peak)
                | 628.pop2_s(base, peak)
------------------------------------------------------------------------------
Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R)
  64, Version 19.0.4.227 Build 20190416
Copyright (C) 1985-2019 Intel Corporation.  All rights reserved.
Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64,
  Version 19.0.4.227 Build 20190416
Copyright (C) 1985-2019 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

Base Compiler Invocation

C benchmarks:

 icc -m64 -std=c11 

Fortran benchmarks:

 ifort -m64 

Benchmarks using both Fortran and C:

 ifort -m64   icc -m64 -std=c11 

Benchmarks using Fortran, C, and C++:

 icpc -m64   icc -m64 -std=c11   ifort -m64 

Base Portability Flags

603.bwaves_s:  -DSPEC_LP64 
607.cactuBSSN_s:  -DSPEC_LP64 
619.lbm_s:  -DSPEC_LP64 
621.wrf_s:  -DSPEC_LP64   -DSPEC_CASE_FLAG   -convert big_endian 
627.cam4_s:  -DSPEC_LP64   -DSPEC_CASE_FLAG 
628.pop2_s:  -DSPEC_LP64   -DSPEC_CASE_FLAG   -convert big_endian   -assume byterecl 
638.imagick_s:  -DSPEC_LP64 
644.nab_s:  -DSPEC_LP64 
649.fotonik3d_s:  -DSPEC_LP64 
654.roms_s:  -DSPEC_LP64 

Base Optimization Flags

C benchmarks:

 -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4   -qopenmp   -DSPEC_OPENMP 

Fortran benchmarks:

 -DSPEC_OPENMP   -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4   -qopenmp   -nostandard-realloc-lhs 

Benchmarks using both Fortran and C:

 -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4   -qopenmp   -DSPEC_OPENMP   -nostandard-realloc-lhs 

Benchmarks using Fortran, C, and C++:

 -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4   -qopenmp   -DSPEC_OPENMP   -nostandard-realloc-lhs 

Peak Compiler Invocation

C benchmarks:

 icc -m64 -std=c11 

Fortran benchmarks:

 ifort -m64 

Benchmarks using both Fortran and C:

 ifort -m64   icc -m64 -std=c11 

Benchmarks using Fortran, C, and C++:

 icpc -m64   icc -m64 -std=c11   ifort -m64 

Peak Portability Flags

Same as Base Portability Flags

Peak Optimization Flags

C benchmarks:

 -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4   -qopenmp   -DSPEC_OPENMP 

Fortran benchmarks:

603.bwaves_s:  basepeak = yes 
649.fotonik3d_s:  -prof-gen(pass 1)   -prof-use(pass 2)   -DSPEC_SUPPRESS_OPENMP   -DSPEC_OPENMP   -O2   -xCORE-AVX512   -qopt-prefetch   -ipo   -O3   -ffinite-math-only   -no-prec-div   -qopt-mem-layout-trans=4   -qopenmp   -nostandard-realloc-lhs 
654.roms_s:  basepeak = yes 

Benchmarks using both Fortran and C:

621.wrf_s:  -prof-gen(pass 1)   -prof-use(pass 2)   -O2   -xCORE-AVX512   -qopt-prefetch   -ipo   -O3   -ffinite-math-only   -no-prec-div   -qopt-mem-layout-trans=4   -DSPEC_SUPPRESS_OPENMP   -qopenmp   -DSPEC_OPENMP   -nostandard-realloc-lhs 
627.cam4_s:  -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4   -qopenmp   -DSPEC_OPENMP   -nostandard-realloc-lhs 
628.pop2_s:  Same as 621.wrf_s 

Benchmarks using Fortran, C, and C++:

 -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4   -qopenmp   -DSPEC_OPENMP   -nostandard-realloc-lhs 

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2017/flags/Intel-ic19.0u1-official-linux64.2019-07-09.html,
http://www.spec.org/cpu2017/flags/NEC-Platform-Settings-V1.2-R120h-RevE.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2017/flags/Intel-ic19.0u1-official-linux64.2019-07-09.xml,
http://www.spec.org/cpu2017/flags/NEC-Platform-Settings-V1.2-R120h-RevE.xml.