SPEC CPU(R)2017 Floating Point Rate Result Cisco Systems Cisco UCS B480 M5 (Intel Xeon Gold 6226, 2.70GHz) CPU2017 License: 9019 Test date: Jan-2020 Test sponsor: Cisco Systems Hardware availability: Apr-2019 Tested by: Cisco Systems Software availability: May-2019 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate --------------- ------- --------- --------- ------- --------- --------- 503.bwaves_r 96 1048 918 S 96 1049 918 S 503.bwaves_r 96 1049 918 S 96 1048 918 * 503.bwaves_r 96 1049 918 * 96 1048 918 S 507.cactuBSSN_r 96 517 235 S 96 517 235 * 507.cactuBSSN_r 96 517 235 S 96 517 235 S 507.cactuBSSN_r 96 517 235 * 96 517 235 S 508.namd_r 96 397 229 S 96 390 234 S 508.namd_r 96 397 230 * 96 394 232 S 508.namd_r 96 397 230 S 96 393 232 * 510.parest_r 96 1269 198 * 96 1270 198 S 510.parest_r 96 1268 198 S 96 1266 198 S 510.parest_r 96 1270 198 S 96 1269 198 * 511.povray_r 96 656 342 S 96 565 396 S 511.povray_r 96 657 341 * 96 564 398 S 511.povray_r 96 657 341 S 96 565 397 * 519.lbm_r 96 487 208 S 96 487 208 S 519.lbm_r 96 487 208 S 96 487 208 * 519.lbm_r 96 487 208 * 96 488 207 S 521.wrf_r 96 594 362 * 96 570 377 * 521.wrf_r 96 593 363 S 96 583 369 S 521.wrf_r 96 596 361 S 96 550 391 S 526.blender_r 96 452 323 S 96 453 323 S 526.blender_r 96 453 322 S 96 452 323 S 526.blender_r 96 453 323 * 96 452 323 * 527.cam4_r 96 488 344 * 96 490 343 S 527.cam4_r 96 490 343 S 96 475 353 S 527.cam4_r 96 485 346 S 96 479 350 * 538.imagick_r 96 333 717 * 96 332 719 S 538.imagick_r 96 331 720 S 96 331 722 S 538.imagick_r 96 333 717 S 96 332 719 * 544.nab_r 96 315 512 S 96 316 512 S 544.nab_r 96 316 512 * 96 319 507 S 544.nab_r 96 318 508 S 96 317 510 * 549.fotonik3d_r 96 1299 288 * 96 1301 288 S 549.fotonik3d_r 96 1299 288 S 96 1298 288 S 549.fotonik3d_r 96 1300 288 S 96 1300 288 * 554.roms_r 96 877 174 S 96 880 173 * 554.roms_r 96 877 174 * 96 881 173 S 554.roms_r 96 877 174 S 96 877 174 S ================================================================================= 503.bwaves_r 96 1049 918 * 96 1048 918 * 507.cactuBSSN_r 96 517 235 * 96 517 235 * 508.namd_r 96 397 230 * 96 393 232 * 510.parest_r 96 1269 198 * 96 1269 198 * 511.povray_r 96 657 341 * 96 565 397 * 519.lbm_r 96 487 208 * 96 487 208 * 521.wrf_r 96 594 362 * 96 570 377 * 526.blender_r 96 453 323 * 96 452 323 * 527.cam4_r 96 488 344 * 96 479 350 * 538.imagick_r 96 333 717 * 96 332 719 * 544.nab_r 96 316 512 * 96 317 510 * 549.fotonik3d_r 96 1299 288 * 96 1300 288 * 554.roms_r 96 877 174 * 96 880 173 * SPECrate(R)2017_fp_base 328 SPECrate(R)2017_fp_peak 334 HARDWARE -------- CPU Name: Intel Xeon Gold 6226 Max MHz: 3700 Nominal: 2700 Enabled: 48 cores, 4 chips, 2 threads/core Orderable: 2,4 Chips Cache L1: 32 KB I + 32 KB D on chip per core L2: 1 MB I+D on chip per core L3: 19.25 MB I+D on chip per chip Other: None Memory: 1536 GB (48 x 32 GB 2Rx4 PC4-2933V-R) Storage: 1 x 1.9 TB SSD SAS Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Server 15 (x86_64) 4.12.14-23-default Compiler: C/C++: Version 19.0.4.227 of Intel C/C++ Compiler for Linux; Fortran: Version 19.0.4.227 of Intel Fortran Compiler for Linux Parallel: No Firmware: Version 4.0.4b released Apr-2019 File System: btrfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 64-bit Other: None Power Management: BIOS set to prefer performance at the cost of additional power usage Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Environment Variables Notes --------------------------- Environment variables set by runcpu before the start of the run: LD_LIBRARY_PATH = "/home/cpu2017/lib/intel64" General Notes ------------- Binaries compiled on a system with 1x Intel Core i9-7900X CPU + 32GB RAM memory using Redhat Enterprise Linux 7.5 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches runcpu command invoked through numactl i.e.: numactl --interleave=all runcpu NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. Platform Notes -------------- BIOS Settings: Intel HyperThreading Technology set to Enabled SNC set to Enabled IMC Interleaving set to 1-way Interleave Patrol Scrub set to Disabled Sysinfo program /home/cpu2017/bin/sysinfo Rev: r6365 of 2019-08-21 295195f888a3d7edb1e6e46a485a0011 running on linux-icbf Wed Jan 15 06:15:00 2020 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Gold 6226 CPU @ 2.70GHz 4 "physical id"s (chips) 96 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 12 siblings : 24 physical 0: cores 0 2 3 5 6 8 9 10 11 12 13 14 physical 1: cores 0 2 3 4 5 6 8 9 10 11 12 13 physical 2: cores 1 2 3 5 6 8 9 10 11 12 13 14 physical 3: cores 1 2 3 4 5 6 8 9 10 11 12 13 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 96 On-line CPU(s) list: 0-95 Thread(s) per core: 2 Core(s) per socket: 12 Socket(s): 4 NUMA node(s): 8 Vendor ID: GenuineIntel CPU family: 6 Model: 85 Model name: Intel(R) Xeon(R) Gold 6226 CPU @ 2.70GHz Stepping: 7 CPU MHz: 2700.000 CPU max MHz: 3700.0000 CPU min MHz: 1200.0000 BogoMIPS: 5400.00 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 1024K L3 cache: 19712K NUMA node0 CPU(s): 0-2,5-7,48-50,53-55 NUMA node1 CPU(s): 3,4,8-11,51,52,56-59 NUMA node2 CPU(s): 12-14,18-20,60-62,66-68 NUMA node3 CPU(s): 15-17,21-23,63-65,69-71 NUMA node4 CPU(s): 24-26,29-31,72-74,77-79 NUMA node5 CPU(s): 27,28,32-35,75,76,80-83 NUMA node6 CPU(s): 36-38,42-44,84-86,90-92 NUMA node7 CPU(s): 39-41,45-47,87-89,93-95 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf tsc_known_freq pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cdp_l3 invpcid_single intel_ppin mba tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx rdt_a avx512f avx512dq rdseed adx smap clflushopt clwb intel_pt avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local ibpb ibrs stibp dtherm ida arat pln pts hwp hwp_act_window hwp_epp hwp_pkg_req pku ospke avx512_vnni arch_capabilities ssbd /proc/cpuinfo cache data cache size : 19712 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 8 nodes (0-7) node 0 cpus: 0 1 2 5 6 7 48 49 50 53 54 55 node 0 size: 192097 MB node 0 free: 183228 MB node 1 cpus: 3 4 8 9 10 11 51 52 56 57 58 59 node 1 size: 193499 MB node 1 free: 188568 MB node 2 cpus: 12 13 14 18 19 20 60 61 62 66 67 68 node 2 size: 193528 MB node 2 free: 188530 MB node 3 cpus: 15 16 17 21 22 23 63 64 65 69 70 71 node 3 size: 193528 MB node 3 free: 188508 MB node 4 cpus: 24 25 26 29 30 31 72 73 74 77 78 79 node 4 size: 193528 MB node 4 free: 188602 MB node 5 cpus: 27 28 32 33 34 35 75 76 80 81 82 83 node 5 size: 193528 MB node 5 free: 188611 MB node 6 cpus: 36 37 38 42 43 44 84 85 86 90 91 92 node 6 size: 193528 MB node 6 free: 188592 MB node 7 cpus: 39 40 41 45 46 47 87 88 89 93 94 95 node 7 size: 193525 MB node 7 free: 188587 MB node distances: node 0 1 2 3 4 5 6 7 0: 10 11 21 21 21 21 21 21 1: 11 10 21 21 21 21 21 21 2: 21 21 10 11 21 21 21 21 3: 21 21 11 10 21 21 21 21 4: 21 21 21 21 10 11 21 21 5: 21 21 21 21 11 10 21 21 6: 21 21 21 21 21 21 10 11 7: 21 21 21 21 21 21 11 10 From /proc/meminfo MemTotal: 1583886856 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* os-release: NAME="SLES" VERSION="15" VERSION_ID="15" PRETTY_NAME="SUSE Linux Enterprise Server 15" ID="sles" ID_LIKE="suse" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:15" uname -a: Linux linux-icbf 4.12.14-23-default #1 SMP Tue May 29 21:04:44 UTC 2018 (cd0437b) x86_64 x86_64 x86_64 GNU/Linux Kernel self-reported vulnerability status: CVE-2018-3620 (L1 Terminal Fault): No status reported Microarchitectural Data Sampling: No status reported CVE-2017-5754 (Meltdown): Not affected CVE-2018-3639 (Speculative Store Bypass): Mitigation: Speculative Store Bypass disabled via prctl and seccomp CVE-2017-5753 (Spectre variant 1): Mitigation: __user pointer sanitization CVE-2017-5715 (Spectre variant 2): Mitigation: Indirect Branch Restricted Speculation, IBPB, IBRS_FW run-level 3 Jan 14 22:29 SPEC is set to: /home/cpu2017 Filesystem Type Size Used Avail Use% Mounted on /dev/sdb2 btrfs 222G 48G 174G 22% /home From /sys/devices/virtual/dmi/id BIOS: Cisco Systems, Inc. B480M5.4.0.4b.0.0407190454 04/07/2019 Vendor: Cisco Systems Inc Product: UCSB-B480-M5 Serial: FLM230102QU Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. Memory: 48x 0xCE00 M393A4K40CB2-CVF 32 GB 2 rank 2933, configured at 2934 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== C | 519.lbm_r(base, peak) 538.imagick_r(base, peak) | 544.nab_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 508.namd_r(base, peak) 510.parest_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++, C | 511.povray_r(base, peak) 526.blender_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++, C, Fortran | 507.cactuBSSN_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran | 503.bwaves_r(base, peak) 549.fotonik3d_r(base, peak) | 554.roms_r(base, peak) ------------------------------------------------------------------------------ Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran, C | 521.wrf_r(base, peak) 527.cam4_r(base, peak) ------------------------------------------------------------------------------ Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icc -m64 -std=c11 C++ benchmarks: icpc -m64 Fortran benchmarks: ifort -m64 Benchmarks using both Fortran and C: ifort -m64 icc -m64 -std=c11 Benchmarks using both C and C++: icpc -m64 icc -m64 -std=c11 Benchmarks using Fortran, C, and C++: icpc -m64 icc -m64 -std=c11 ifort -m64 Base Portability Flags ---------------------- 503.bwaves_r: -DSPEC_LP64 507.cactuBSSN_r: -DSPEC_LP64 508.namd_r: -DSPEC_LP64 510.parest_r: -DSPEC_LP64 511.povray_r: -DSPEC_LP64 519.lbm_r: -DSPEC_LP64 521.wrf_r: -DSPEC_LP64 -DSPEC_CASE_FLAG -convert big_endian 526.blender_r: -DSPEC_LP64 -DSPEC_LINUX -funsigned-char 527.cam4_r: -DSPEC_LP64 -DSPEC_CASE_FLAG 538.imagick_r: -DSPEC_LP64 544.nab_r: -DSPEC_LP64 549.fotonik3d_r: -DSPEC_LP64 554.roms_r: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 C++ benchmarks: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 Fortran benchmarks: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -auto -nostandard-realloc-lhs -align array32byte Benchmarks using both Fortran and C: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -auto -nostandard-realloc-lhs -align array32byte Benchmarks using both C and C++: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 Benchmarks using Fortran, C, and C++: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -auto -nostandard-realloc-lhs -align array32byte Peak Compiler Invocation ------------------------ C benchmarks: icc -m64 -std=c11 C++ benchmarks: icpc -m64 Fortran benchmarks: ifort -m64 Benchmarks using both Fortran and C: ifort -m64 icc -m64 -std=c11 Benchmarks using both C and C++: icpc -m64 icc -m64 -std=c11 Benchmarks using Fortran, C, and C++: icpc -m64 icc -m64 -std=c11 ifort -m64 Peak Portability Flags ---------------------- Same as Base Portability Flags Peak Optimization Flags ----------------------- C benchmarks: 519.lbm_r: -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 538.imagick_r: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 544.nab_r: Same as 538.imagick_r C++ benchmarks: 508.namd_r: -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 510.parest_r: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 Fortran benchmarks: 503.bwaves_r: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -auto -nostandard-realloc-lhs -align array32byte 549.fotonik3d_r: Same as 503.bwaves_r 554.roms_r: -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -auto -nostandard-realloc-lhs -align array32byte Benchmarks using both Fortran and C: -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -auto -nostandard-realloc-lhs -align array32byte Benchmarks using both C and C++: 511.povray_r: -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 526.blender_r: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 Benchmarks using Fortran, C, and C++: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -auto -nostandard-realloc-lhs -align array32byte The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic19.0u1-official-linux64.2019-07-09.html http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revJ.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic19.0u1-official-linux64.2019-07-09.xml http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revJ.xml SPEC CPU and SPECrate are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ---------------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2020 Standard Performance Evaluation Corporation Tested with SPEC CPU(R)2017 v1.1.0 on 2020-01-15 09:14:59-0500. Report generated on 2020-02-18 18:05:06 by CPU2017 text formatter v6255. Originally published on 2020-02-18.