SPEC CPU(R)2017 Floating Point Rate Result Cisco Systems Cisco UCS B480 M5 (Intel Xeon Gold 6248, 2.50GHz) CPU2017 License: 9019 Test date: Oct-2019 Test sponsor: Cisco Systems Hardware availability: Apr-2019 Tested by: Cisco Systems Software availability: May-2019 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate --------------- ------- --------- --------- ------- --------- --------- 503.bwaves_r 160 1590 1010 S 160 1590 1010 S 503.bwaves_r 160 1592 1010 S 160 1590 1010 * 503.bwaves_r 160 1591 1010 * 160 1589 1010 S 507.cactuBSSN_r 160 571 355 S 160 571 355 S 507.cactuBSSN_r 160 572 354 S 160 571 355 * 507.cactuBSSN_r 160 571 355 * 160 570 355 S 508.namd_r 160 434 351 S 160 430 354 * 508.namd_r 160 431 352 S 160 431 353 S 508.namd_r 160 432 352 * 160 429 355 S 510.parest_r 160 1755 239 S 160 1759 238 S 510.parest_r 160 1758 238 S 160 1756 238 * 510.parest_r 160 1755 238 * 160 1754 239 S 511.povray_r 160 724 516 S 160 617 606 S 511.povray_r 160 725 516 S 160 619 603 S 511.povray_r 160 724 516 * 160 618 605 * 519.lbm_r 160 690 244 S 160 690 245 * 519.lbm_r 160 690 244 * 160 690 244 S 519.lbm_r 160 690 244 S 160 690 245 S 521.wrf_r 160 814 441 S 160 801 448 * 521.wrf_r 160 791 453 S 160 804 446 S 521.wrf_r 160 799 449 * 160 783 458 S 526.blender_r 160 500 487 * 160 500 487 * 526.blender_r 160 500 488 S 160 501 486 S 526.blender_r 160 501 487 S 160 499 488 S 527.cam4_r 160 545 514 * 160 535 523 S 527.cam4_r 160 545 513 S 160 533 525 * 527.cam4_r 160 543 515 S 160 532 526 S 538.imagick_r 160 362 1100 S 160 364 1090 S 538.imagick_r 160 361 1100 S 160 361 1100 S 538.imagick_r 160 361 1100 * 160 364 1090 * 544.nab_r 160 345 781 S 160 344 783 * 544.nab_r 160 344 784 * 160 344 784 S 544.nab_r 160 343 785 S 160 346 779 S 549.fotonik3d_r 160 1901 328 S 160 1899 328 S 549.fotonik3d_r 160 1901 328 S 160 1901 328 S 549.fotonik3d_r 160 1901 328 * 160 1901 328 * 554.roms_r 160 1283 198 * 160 1285 198 * 554.roms_r 160 1280 199 S 160 1288 197 S 554.roms_r 160 1285 198 S 160 1285 198 S ================================================================================= 503.bwaves_r 160 1591 1010 * 160 1590 1010 * 507.cactuBSSN_r 160 571 355 * 160 571 355 * 508.namd_r 160 432 352 * 160 430 354 * 510.parest_r 160 1755 238 * 160 1756 238 * 511.povray_r 160 724 516 * 160 618 605 * 519.lbm_r 160 690 244 * 160 690 245 * 521.wrf_r 160 799 449 * 160 801 448 * 526.blender_r 160 500 487 * 160 500 487 * 527.cam4_r 160 545 514 * 160 533 525 * 538.imagick_r 160 361 1100 * 160 364 1090 * 544.nab_r 160 344 784 * 160 344 783 * 549.fotonik3d_r 160 1901 328 * 160 1901 328 * 554.roms_r 160 1283 198 * 160 1285 198 * SPECrate(R)2017_fp_base 441 SPECrate(R)2017_fp_peak 447 HARDWARE -------- CPU Name: Intel Xeon Gold 6248 Max MHz: 3900 Nominal: 2500 Enabled: 80 cores, 4 chips, 2 threads/core Orderable: 2,4 Chips Cache L1: 32 KB I + 32 KB D on chip per core L2: 1 MB I+D on chip per core L3: 27.5 MB I+D on chip per chip Other: None Memory: 1536 GB (48 x 32 GB 2Rx4 PC4-2933V-R) Storage: 1 x 1.9 TB SSD SAS Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Desktop 15 (x86_64) 4.12.14-23-default Compiler: C/C++: Version 19.0.4.227 of Intel C/C++ Compiler for Linux; Fortran: Version 19.0.4.227 of Intel Fortran Compiler for Linux Parallel: No Firmware: Version 4.0.4b released Apr-2019 File System: xfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 64-bit Other: None Power Management: default Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Environment Variables Notes --------------------------- Environment variables set by runcpu before the start of the run: LD_LIBRARY_PATH = "/home/cpu2017/lib/intel64" General Notes ------------- Binaries compiled on a system with 1x Intel Core i9-7900X CPU + 32GB RAM memory using Redhat Enterprise Linux 7.5 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches runcpu command invoked through numactl i.e.: numactl --interleave=all runcpu NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. Platform Notes -------------- BIOS Settings: Intel HyperThreading Technology set to Enabled SNC set to Enabled IMC Interleaving set to 1-way Interleave Patrol Scrub set to Disabled Sysinfo program /home/cpu2017/bin/sysinfo Rev: r6365 of 2019-08-21 295195f888a3d7edb1e6e46a485a0011 running on linux-0enh Wed Oct 30 11:59:22 2019 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Gold 6248 CPU @ 2.50GHz 4 "physical id"s (chips) 160 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 20 siblings : 40 physical 0: cores 0 1 2 3 4 8 9 10 11 12 16 17 18 19 20 24 25 26 27 28 physical 1: cores 0 1 2 3 4 8 9 10 11 12 16 17 18 19 20 24 25 26 27 28 physical 2: cores 0 1 2 3 4 8 9 10 11 12 16 17 18 19 20 24 25 26 27 28 physical 3: cores 0 1 2 3 4 8 9 10 11 12 16 17 18 19 20 24 25 26 27 28 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 160 On-line CPU(s) list: 0-159 Thread(s) per core: 2 Core(s) per socket: 20 Socket(s): 4 NUMA node(s): 8 Vendor ID: GenuineIntel CPU family: 6 Model: 85 Model name: Intel(R) Xeon(R) Gold 6248 CPU @ 2.50GHz Stepping: 6 CPU MHz: 2500.000 CPU max MHz: 3900.0000 CPU min MHz: 1000.0000 BogoMIPS: 5000.00 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 1024K L3 cache: 28160K NUMA node0 CPU(s): 0-2,5,6,10-12,15,16,80-82,85,86,90-92,95,96 NUMA node1 CPU(s): 3,4,7-9,13,14,17-19,83,84,87-89,93,94,97-99 NUMA node2 CPU(s): 20-22,25,26,30-32,35,36,100-102,105,106,110-112,115,116 NUMA node3 CPU(s): 23,24,27-29,33,34,37-39,103,104,107-109,113,114,117-119 NUMA node4 CPU(s): 40-42,45,46,50-52,55,56,120-122,125,126,130-132,135,136 NUMA node5 CPU(s): 43,44,47-49,53,54,57-59,123,124,127-129,133,134,137-139 NUMA node6 CPU(s): 60-62,65,66,70-72,75,76,140-142,145,146,150-152,155,156 NUMA node7 CPU(s): 63,64,67-69,73,74,77-79,143,144,147-149,153,154,157-159 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf tsc_known_freq pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cdp_l3 invpcid_single intel_ppin mba tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx rdt_a avx512f avx512dq rdseed adx smap clflushopt clwb intel_pt avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local ibpb ibrs stibp dtherm ida arat pln pts hwp hwp_act_window hwp_epp hwp_pkg_req pku ospke avx512_vnni arch_capabilities ssbd /proc/cpuinfo cache data cache size : 28160 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 8 nodes (0-7) node 0 cpus: 0 1 2 5 6 10 11 12 15 16 80 81 82 85 86 90 91 92 95 96 node 0 size: 191936 MB node 0 free: 180399 MB node 1 cpus: 3 4 7 8 9 13 14 17 18 19 83 84 87 88 89 93 94 97 98 99 node 1 size: 193526 MB node 1 free: 185468 MB node 2 cpus: 20 21 22 25 26 30 31 32 35 36 100 101 102 105 106 110 111 112 115 116 node 2 size: 193526 MB node 2 free: 185484 MB node 3 cpus: 23 24 27 28 29 33 34 37 38 39 103 104 107 108 109 113 114 117 118 119 node 3 size: 193526 MB node 3 free: 185482 MB node 4 cpus: 40 41 42 45 46 50 51 52 55 56 120 121 122 125 126 130 131 132 135 136 node 4 size: 193497 MB node 4 free: 185460 MB node 5 cpus: 43 44 47 48 49 53 54 57 58 59 123 124 127 128 129 133 134 137 138 139 node 5 size: 193526 MB node 5 free: 185499 MB node 6 cpus: 60 61 62 65 66 70 71 72 75 76 140 141 142 145 146 150 151 152 155 156 node 6 size: 193526 MB node 6 free: 185498 MB node 7 cpus: 63 64 67 68 69 73 74 77 78 79 143 144 147 148 149 153 154 157 158 159 node 7 size: 193524 MB node 7 free: 185491 MB node distances: node 0 1 2 3 4 5 6 7 0: 10 11 21 21 21 21 21 21 1: 11 10 21 21 21 21 21 21 2: 21 21 10 11 21 21 21 21 3: 21 21 11 10 21 21 21 21 4: 21 21 21 21 10 11 21 21 5: 21 21 21 21 11 10 21 21 6: 21 21 21 21 21 21 10 11 7: 21 21 21 21 21 21 11 10 From /proc/meminfo MemTotal: 1583711248 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* os-release: NAME="SLED" VERSION="15" VERSION_ID="15" PRETTY_NAME="SUSE Linux Enterprise Desktop 15" ID="sled" ID_LIKE="suse" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sled:15" uname -a: Linux linux-0enh 4.12.14-23-default #1 SMP Tue May 29 21:04:44 UTC 2018 (cd0437b) x86_64 x86_64 x86_64 GNU/Linux Kernel self-reported vulnerability status: CVE-2018-3620 (L1 Terminal Fault): No status reported Microarchitectural Data Sampling: No status reported CVE-2017-5754 (Meltdown): Not affected CVE-2018-3639 (Speculative Store Bypass): Mitigation: Speculative Store Bypass disabled via prctl and seccomp CVE-2017-5753 (Spectre variant 1): Mitigation: __user pointer sanitization CVE-2017-5715 (Spectre variant 2): Mitigation: Indirect Branch Restricted Speculation, IBPB, IBRS_FW run-level 3 Oct 30 03:24 SPEC is set to: /home/cpu2017 Filesystem Type Size Used Avail Use% Mounted on /dev/sda1 xfs 224G 88G 137G 39% / From /sys/devices/virtual/dmi/id BIOS: Cisco Systems, Inc. B480M5.4.0.4b.0.0407190454 04/07/2019 Vendor: Cisco Systems Inc Product: UCSB-B480-M5 Serial: FLM2230020U Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. Memory: 48x 0xCE00 M393A4K40CB2-CVF 32 GB 2 rank 2933, configured at 2934 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== C | 519.lbm_r(base, peak) 538.imagick_r(base, peak) | 544.nab_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 508.namd_r(base, peak) 510.parest_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++, C | 511.povray_r(base, peak) 526.blender_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++, C, Fortran | 507.cactuBSSN_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran | 503.bwaves_r(base, peak) 549.fotonik3d_r(base, peak) | 554.roms_r(base, peak) ------------------------------------------------------------------------------ Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran, C | 521.wrf_r(base, peak) 527.cam4_r(base, peak) ------------------------------------------------------------------------------ Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icc -m64 -std=c11 C++ benchmarks: icpc -m64 Fortran benchmarks: ifort -m64 Benchmarks using both Fortran and C: ifort -m64 icc -m64 -std=c11 Benchmarks using both C and C++: icpc -m64 icc -m64 -std=c11 Benchmarks using Fortran, C, and C++: icpc -m64 icc -m64 -std=c11 ifort -m64 Base Portability Flags ---------------------- 503.bwaves_r: -DSPEC_LP64 507.cactuBSSN_r: -DSPEC_LP64 508.namd_r: -DSPEC_LP64 510.parest_r: -DSPEC_LP64 511.povray_r: -DSPEC_LP64 519.lbm_r: -DSPEC_LP64 521.wrf_r: -DSPEC_LP64 -DSPEC_CASE_FLAG -convert big_endian 526.blender_r: -DSPEC_LP64 -DSPEC_LINUX -funsigned-char 527.cam4_r: -DSPEC_LP64 -DSPEC_CASE_FLAG 538.imagick_r: -DSPEC_LP64 544.nab_r: -DSPEC_LP64 549.fotonik3d_r: -DSPEC_LP64 554.roms_r: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 C++ benchmarks: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 Fortran benchmarks: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -auto -nostandard-realloc-lhs -align array32byte Benchmarks using both Fortran and C: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -auto -nostandard-realloc-lhs -align array32byte Benchmarks using both C and C++: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 Benchmarks using Fortran, C, and C++: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -auto -nostandard-realloc-lhs -align array32byte Peak Compiler Invocation ------------------------ C benchmarks: icc -m64 -std=c11 C++ benchmarks: icpc -m64 Fortran benchmarks: ifort -m64 Benchmarks using both Fortran and C: ifort -m64 icc -m64 -std=c11 Benchmarks using both C and C++: icpc -m64 icc -m64 -std=c11 Benchmarks using Fortran, C, and C++: icpc -m64 icc -m64 -std=c11 ifort -m64 Peak Portability Flags ---------------------- Same as Base Portability Flags Peak Optimization Flags ----------------------- C benchmarks: 519.lbm_r: -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 538.imagick_r: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 544.nab_r: Same as 538.imagick_r C++ benchmarks: 508.namd_r: -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 510.parest_r: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 Fortran benchmarks: 503.bwaves_r: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -auto -nostandard-realloc-lhs -align array32byte 549.fotonik3d_r: Same as 503.bwaves_r 554.roms_r: -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -auto -nostandard-realloc-lhs -align array32byte Benchmarks using both Fortran and C: -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -auto -nostandard-realloc-lhs -align array32byte Benchmarks using both C and C++: 511.povray_r: -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 526.blender_r: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 Benchmarks using Fortran, C, and C++: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -auto -nostandard-realloc-lhs -align array32byte The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic19.0u1-official-linux64.2019-07-09.html http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revJ.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic19.0u1-official-linux64.2019-07-09.xml http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revJ.xml SPEC CPU and SPECrate are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ---------------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2019 Standard Performance Evaluation Corporation Tested with SPEC CPU(R)2017 v1.1.0 on 2019-10-30 11:59:22-0400. Report generated on 2019-12-17 17:47:56 by CPU2017 text formatter v6255. Originally published on 2019-12-17.