SPEC CPU(R)2017 Integer Rate Result Inspur Corporation Inspur TS860M5 (Intel Xeon Platinum 8253) CPU2017 License: 3358 Test date: Oct-2019 Test sponsor: Inspur Corporation Hardware availability: Apr-2019 Tested by: Inspur Corporation Software availability: May-2019 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate --------------- ------- --------- --------- ------- --------- --------- 500.perlbench_r 256 819 498 S 256 713 572 * 500.perlbench_r 256 822 496 * 256 713 571 S 500.perlbench_r 256 826 494 S 256 713 572 S 502.gcc_r 256 960 378 * 256 749 484 S 502.gcc_r 256 973 373 S 256 758 479 * 502.gcc_r 256 925 392 S 256 763 475 S 505.mcf_r 256 610 678 S 256 612 676 S 505.mcf_r 256 609 679 * 256 607 681 S 505.mcf_r 256 608 681 S 256 609 679 * 520.omnetpp_r 256 1089 309 * 256 1090 308 S 520.omnetpp_r 256 1089 309 S 256 1090 308 * 520.omnetpp_r 256 1088 309 S 256 1088 309 S 523.xalancbmk_r 256 499 542 S 256 444 609 * 523.xalancbmk_r 256 503 538 S 256 443 610 S 523.xalancbmk_r 256 502 539 * 256 444 608 S 525.x264_r 256 378 1190 * 256 367 1220 * 525.x264_r 256 372 1200 S 256 366 1230 S 525.x264_r 256 382 1170 S 256 368 1220 S 531.deepsjeng_r 256 550 534 * 256 549 534 S 531.deepsjeng_r 256 550 533 S 256 549 534 S 531.deepsjeng_r 256 549 534 S 256 549 534 * 541.leela_r 256 843 503 S 256 856 495 * 541.leela_r 256 857 494 S 256 850 499 S 541.leela_r 256 856 495 * 256 856 495 S 548.exchange2_r 256 513 1310 S 256 513 1310 * 548.exchange2_r 256 513 1310 S 256 513 1310 S 548.exchange2_r 256 513 1310 * 256 513 1310 S 557.xz_r 256 691 400 S 256 691 400 S 557.xz_r 256 690 401 * 256 690 401 S 557.xz_r 256 690 401 S 256 690 401 * ================================================================================= 500.perlbench_r 256 822 496 * 256 713 572 * 502.gcc_r 256 960 378 * 256 758 479 * 505.mcf_r 256 609 679 * 256 609 679 * 520.omnetpp_r 256 1089 309 * 256 1090 308 * 523.xalancbmk_r 256 502 539 * 256 444 609 * 525.x264_r 256 378 1190 * 256 367 1220 * 531.deepsjeng_r 256 550 534 * 256 549 534 * 541.leela_r 256 856 495 * 256 856 495 * 548.exchange2_r 256 513 1310 * 256 513 1310 * 557.xz_r 256 690 401 * 256 690 401 * SPECrate(R)2017_int_base 568 SPECrate(R)2017_int_peak 599 HARDWARE -------- CPU Name: Intel Xeon Platinum 8253 Max MHz: 3000 Nominal: 2200 Enabled: 128 cores, 8 chips, 2 threads/core Orderable: 2,4,6,8 chips Cache L1: 32 KB I + 32 KB D on chip per core L2: 1 MB I+D on chip per core L3: 22 MB I+D on chip per chip Other: None Memory: 3 TB (96 x 32 GB 2Rx4 PC4-2933Y-R) Storage: 1 x 2 TB SATA SSD Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Server 12 SP4 4.12.14-94.41-default Compiler: C/C++: Version 19.0.4.227 of Intel C/C++ Compiler Build 20190416 for Linux; Fortran: Version 19.0.4.227 of Intel Fortran Compiler Build 20190416 for Linux Parallel: No Firmware: Version 4.1.09 released Jun-2019 File System: xfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 32/64-bit Other: jemalloc memory allocator V5.0.1 Power Management: -- Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" General Notes ------------- Environment variables set by runcpu before the start of the run: LD_LIBRARY_PATH = "/home/CPU2017/lib/intel64:/home/CPU2017/lib/ia32:/home/CPU2017/je5.0.1-32" Binaries compiled on a system with 1x Intel Core i9-799X CPU + 32GB RAM memory using Redhat Enterprise Linux 7.5 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches runcpu command invoked through numactl i.e.: numactl --interleave=all runcpu NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. jemalloc, a general purpose malloc implementation built with the RedHat Enterprise 7.5, and the system compiler gcc 4.8.5; sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases Platform Notes -------------- BIOS and OS configuration: SCALING_GOVERNOR set to Performance Hardware Prefetch set to Disable VT Support set to Disable C1E Support set to Disable IMC (Integrated memory controller) Interleaving set to 1-way Sub NUMA Cluster (SNC) set to Enable Sysinfo program /home/CPU2017/bin/sysinfo Rev: r5974 of 2018-05-19 9bcde8f2999c33d61f64985e45859ea9 running on linux-atnv Sat Oct 12 06:35:37 2019 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Platinum 8253 CPU @ 2.20GHz 8 "physical id"s (chips) 256 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 16 siblings : 32 physical 0: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 physical 1: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 physical 2: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 physical 3: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 physical 4: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 physical 5: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 physical 6: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 physical 7: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 256 On-line CPU(s) list: 0-255 Thread(s) per core: 2 Core(s) per socket: 16 Socket(s): 8 NUMA node(s): 16 Vendor ID: GenuineIntel CPU family: 6 Model: 85 Model name: Intel(R) Xeon(R) Platinum 8253 CPU @ 2.20GHz Stepping: 6 CPU MHz: 2200.000 CPU max MHz: 3000.0000 CPU min MHz: 1000.0000 BogoMIPS: 4400.00 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 1024K L3 cache: 22528K NUMA node0 CPU(s): 0-3,8-11,128-131,136-139 NUMA node1 CPU(s): 4-7,12-15,132-135,140-143 NUMA node2 CPU(s): 16-19,24-27,144-147,152-155 NUMA node3 CPU(s): 20-23,28-31,148-151,156-159 NUMA node4 CPU(s): 32-35,40-43,160-163,168-171 NUMA node5 CPU(s): 36-39,44-47,164-167,172-175 NUMA node6 CPU(s): 48-51,56-59,176-179,184-187 NUMA node7 CPU(s): 52-55,60-63,180-183,188-191 NUMA node8 CPU(s): 64-67,72-75,192-195,200-203 NUMA node9 CPU(s): 68-71,76-79,196-199,204-207 NUMA node10 CPU(s): 80-83,88-91,208-211,216-219 NUMA node11 CPU(s): 84-87,92-95,212-215,220-223 NUMA node12 CPU(s): 96-99,104-107,224-227,232-235 NUMA node13 CPU(s): 100-103,108-111,228-231,236-239 NUMA node14 CPU(s): 112-115,120-123,240-243,248-251 NUMA node15 CPU(s): 116-119,124-127,244-247,252-255 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cdp_l3 invpcid_single intel_ppin ssbd mba ibrs ibpb stibp tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx rdt_a avx512f avx512dq rdseed adx smap clflushopt clwb intel_pt avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local dtherm ida arat pln pts hwp hwp_act_window hwp_epp hwp_pkg_req pku ospke avx512_vnni flush_l1d arch_capabilities /proc/cpuinfo cache data cache size : 22528 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 16 nodes (0-15) node 0 cpus: 0 1 2 3 8 9 10 11 128 129 130 131 136 137 138 139 node 0 size: 193073 MB node 0 free: 192474 MB node 1 cpus: 4 5 6 7 12 13 14 15 132 133 134 135 140 141 142 143 node 1 size: 193527 MB node 1 free: 193290 MB node 2 cpus: 16 17 18 19 24 25 26 27 144 145 146 147 152 153 154 155 node 2 size: 193527 MB node 2 free: 193340 MB node 3 cpus: 20 21 22 23 28 29 30 31 148 149 150 151 156 157 158 159 node 3 size: 193527 MB node 3 free: 193366 MB node 4 cpus: 32 33 34 35 40 41 42 43 160 161 162 163 168 169 170 171 node 4 size: 193527 MB node 4 free: 193368 MB node 5 cpus: 36 37 38 39 44 45 46 47 164 165 166 167 172 173 174 175 node 5 size: 193527 MB node 5 free: 193369 MB node 6 cpus: 48 49 50 51 56 57 58 59 176 177 178 179 184 185 186 187 node 6 size: 193527 MB node 6 free: 193365 MB node 7 cpus: 52 53 54 55 60 61 62 63 180 181 182 183 188 189 190 191 node 7 size: 193527 MB node 7 free: 193362 MB node 8 cpus: 64 65 66 67 72 73 74 75 192 193 194 195 200 201 202 203 node 8 size: 193527 MB node 8 free: 193293 MB node 9 cpus: 68 69 70 71 76 77 78 79 196 197 198 199 204 205 206 207 node 9 size: 193498 MB node 9 free: 193246 MB node 10 cpus: 80 81 82 83 88 89 90 91 208 209 210 211 216 217 218 219 node 10 size: 193527 MB node 10 free: 193262 MB node 11 cpus: 84 85 86 87 92 93 94 95 212 213 214 215 220 221 222 223 node 11 size: 193527 MB node 11 free: 193140 MB node 12 cpus: 96 97 98 99 104 105 106 107 224 225 226 227 232 233 234 235 node 12 size: 193527 MB node 12 free: 193315 MB node 13 cpus: 100 101 102 103 108 109 110 111 228 229 230 231 236 237 238 239 node 13 size: 193527 MB node 13 free: 193333 MB node 14 cpus: 112 113 114 115 120 121 122 123 240 241 242 243 248 249 250 251 node 14 size: 193527 MB node 14 free: 193360 MB node 15 cpus: 116 117 118 119 124 125 126 127 244 245 246 247 252 253 254 255 node 15 size: 193305 MB node 15 free: 193140 MB node distances: node 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0: 10 11 21 21 31 31 21 21 31 31 21 21 31 31 31 31 1: 11 10 21 21 31 31 21 21 31 31 21 21 31 31 31 31 2: 21 21 10 11 21 21 31 31 21 21 31 31 31 31 31 31 3: 21 21 11 10 21 21 31 31 21 21 31 31 31 31 31 31 4: 31 31 21 21 10 11 21 21 31 31 31 31 21 21 31 31 5: 31 31 21 21 11 10 21 21 31 31 31 31 21 21 31 31 6: 21 21 31 31 21 21 10 11 31 31 31 31 31 31 21 21 7: 21 21 31 31 21 21 11 10 31 31 31 31 31 31 21 21 8: 31 31 21 21 31 31 31 31 10 11 21 21 31 31 21 21 9: 31 31 21 21 31 31 31 31 11 10 21 21 31 31 21 21 10: 21 21 31 31 31 31 31 31 21 21 10 11 21 21 31 31 11: 21 21 31 31 31 31 31 31 21 21 11 10 21 21 31 31 12: 31 31 31 31 21 21 31 31 31 31 21 21 10 11 21 21 13: 31 31 31 31 21 21 31 31 31 31 21 21 11 10 21 21 14: 31 31 31 31 31 31 21 21 21 21 31 31 21 21 10 11 15: 31 31 31 31 31 31 21 21 21 21 31 31 21 21 11 10 From /proc/meminfo MemTotal: 3170034112 kB HugePages_Total: 0 Hugepagesize: 2048 kB /usr/bin/lsb_release -d SUSE Linux Enterprise Server 12 SP4 From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 4 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP4" VERSION_ID="12.4" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP4" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp4" uname -a: Linux linux-atnv 4.12.14-94.41-default #1 SMP Wed Oct 31 12:25:04 UTC 2018 (3090901) x86_64 x86_64 x86_64 GNU/Linux Kernel self-reported vulnerability status: CVE-2017-5754 (Meltdown): Not affected CVE-2017-5753 (Spectre variant 1): Mitigation: __user pointer sanitization CVE-2017-5715 (Spectre variant 2): Mitigation: Indirect Branch Restricted Speculation, IBPB, IBRS_FW run-level 3 Oct 12 06:33 last=5 SPEC is set to: /home/CPU2017 Filesystem Type Size Used Avail Use% Mounted on /dev/sdb4 xfs 1.8T 103G 1.7T 6% /home Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS Inspur 4.1.09 06/20/2019 Memory: 96x Hynix HMAA4GR7AJR8N-WM 32 GB 2 rank 2933 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== C | 502.gcc_r(peak) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler for applications running on IA-32, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C | 500.perlbench_r(base, peak) 502.gcc_r(base) 505.mcf_r(base, peak) | 525.x264_r(base, peak) 557.xz_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C | 502.gcc_r(peak) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler for applications running on IA-32, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C | 500.perlbench_r(base, peak) 502.gcc_r(base) 505.mcf_r(base, peak) | 525.x264_r(base, peak) 557.xz_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 523.xalancbmk_r(peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on IA-32, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 520.omnetpp_r(base, peak) 523.xalancbmk_r(base) | 531.deepsjeng_r(base, peak) 541.leela_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 523.xalancbmk_r(peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on IA-32, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 520.omnetpp_r(base, peak) 523.xalancbmk_r(base) | 531.deepsjeng_r(base, peak) 541.leela_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran | 548.exchange2_r(base, peak) ------------------------------------------------------------------------------ Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icc -m64 -std=c11 C++ benchmarks: icpc -m64 Fortran benchmarks: ifort -m64 Base Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -DSPEC_LP64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -DSPEC_LP64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/intel64 -lqkmalloc C++ benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/intel64 -lqkmalloc Fortran benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -nostandard-realloc-lhs -align array32byte -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/intel64 -lqkmalloc Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m64 -std=c11 502.gcc_r: icc -m32 -std=c11 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/ia32_lin C++ benchmarks (except as noted below): icpc -m64 523.xalancbmk_r: icpc -m32 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/ia32_lin Fortran benchmarks: ifort -m64 Peak Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -D_FILE_OFFSET_BITS=64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -D_FILE_OFFSET_BITS=64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Peak Optimization Flags ----------------------- C benchmarks: 500.perlbench_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=4 -fno-strict-overflow -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/intel64 -lqkmalloc 502.gcc_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=4 -L/usr/local/je5.0.1-32/lib -ljemalloc 505.mcf_r: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/intel64 -lqkmalloc 525.x264_r: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -fno-alias -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/intel64 -lqkmalloc 557.xz_r: Same as 505.mcf_r C++ benchmarks: 520.omnetpp_r: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/intel64 -lqkmalloc 523.xalancbmk_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=4 -L/usr/local/je5.0.1-32/lib -ljemalloc 531.deepsjeng_r: Same as 520.omnetpp_r 541.leela_r: Same as 520.omnetpp_r Fortran benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -nostandard-realloc-lhs -align array32byte -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/intel64 -lqkmalloc The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic19.0u1-official-linux64.2019-07-09.html http://www.spec.org/cpu2017/flags/Inspur-Platform-Settings-V1.4-CAS.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic19.0u1-official-linux64.2019-07-09.xml http://www.spec.org/cpu2017/flags/Inspur-Platform-Settings-V1.4-CAS.xml SPEC CPU and SPECrate are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ---------------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2019 Standard Performance Evaluation Corporation Tested with SPEC CPU(R)2017 v1.0.5 on 2019-10-12 06:35:36-0400. Report generated on 2019-10-29 16:07:39 by CPU2017 text formatter v6255. Originally published on 2019-10-29.