SPEC(R) CPU2017 Integer Rate Result NEC Corporation Express5800/T110j-S (Intel Pentium Gold G5400) CPU2017 License: 9006 Test date: Dec-2018 Test sponsor: NEC Corporation Hardware availability: Dec-2018 Tested by: NEC Corporation Software availability: Aug-2018 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate --------------- ------- --------- --------- ------- --------- --------- 500.perlbench_r 4 574 11.1 * 4 481 13.2 S 500.perlbench_r 4 578 11.0 S 4 480 13.3 * 500.perlbench_r 4 569 11.2 S 4 476 13.4 S 502.gcc_r 4 411 13.8 * 4 354 16.0 S 502.gcc_r 4 411 13.8 S 4 354 16.0 S 502.gcc_r 4 412 13.8 S 4 354 16.0 * 505.mcf_r 4 441 14.7 S 4 441 14.7 S 505.mcf_r 4 444 14.6 * 4 444 14.6 * 505.mcf_r 4 446 14.5 S 4 446 14.5 S 520.omnetpp_r 4 609 8.62 S 4 581 9.03 S 520.omnetpp_r 4 609 8.62 * 4 585 8.97 * 520.omnetpp_r 4 611 8.60 S 4 585 8.97 S 523.xalancbmk_r 4 288 14.7 S 4 230 18.4 * 523.xalancbmk_r 4 289 14.6 S 4 230 18.4 S 523.xalancbmk_r 4 289 14.6 * 4 230 18.4 S 525.x264_r 4 382 18.3 S 4 366 19.1 S 525.x264_r 4 384 18.2 * 4 368 19.0 S 525.x264_r 4 389 18.0 S 4 368 19.0 * 531.deepsjeng_r 4 390 11.8 S 4 378 12.1 S 531.deepsjeng_r 4 389 11.8 * 4 378 12.1 * 531.deepsjeng_r 4 389 11.8 S 4 378 12.1 S 541.leela_r 4 622 10.6 * 4 619 10.7 S 541.leela_r 4 622 10.6 S 4 612 10.8 * 541.leela_r 4 628 10.6 S 4 610 10.9 S 548.exchange2_r 4 652 16.1 S 4 651 16.1 S 548.exchange2_r 4 651 16.1 S 4 651 16.1 * 548.exchange2_r 4 651 16.1 * 4 651 16.1 S 557.xz_r 4 526 8.22 S 4 527 8.20 S 557.xz_r 4 525 8.23 * 4 524 8.24 * 557.xz_r 4 524 8.25 S 4 522 8.27 S ================================================================================= 500.perlbench_r 4 574 11.1 * 4 480 13.3 * 502.gcc_r 4 411 13.8 * 4 354 16.0 * 505.mcf_r 4 444 14.6 * 4 444 14.6 * 520.omnetpp_r 4 609 8.62 * 4 585 8.97 * 523.xalancbmk_r 4 289 14.6 * 4 230 18.4 * 525.x264_r 4 384 18.2 * 4 368 19.0 * 531.deepsjeng_r 4 389 11.8 * 4 378 12.1 * 541.leela_r 4 622 10.6 * 4 612 10.8 * 548.exchange2_r 4 651 16.1 * 4 651 16.1 * 557.xz_r 4 525 8.23 * 4 524 8.24 * SPECrate2017_int_base 12.4 SPECrate2017_int_peak 13.3 HARDWARE -------- CPU Name: Intel Pentium Gold G5400 Max MHz.: 3700 Nominal: 3700 Enabled: 2 cores, 1 chip, 2 threads/core Orderable: 1 chip Cache L1: 32 KB I + 32 KB D on chip per core L2: 256 KB I+D on chip per core L3: 4 MB I+D on chip per chip Other: None Memory: 64 GB (4 x 16 GB 2Rx8 PC4-2666V-E, running at 2400) Storage: 1 x 1 TB SATA, 7200 RPM Other: None SOFTWARE -------- OS: Red Hat Enterprise Linux Server release 7.5 (Maipo) Kernel 3.10.0-862.11.6.el7.x86_64 Compiler: C/C++: Version 18.0.0.128 of Intel C/C++ Compiler for Linux; Fortran: Version 18.0.0.128 of Intel Fortran Compiler for Linux Parallel: No Firmware: NEC BIOS Version F07 10/31/2018 released Dec-2018 File System: ext4 System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 32/64-bit Other: jemalloc memory allocator V5.0.1 Submit Notes ------------ The taskset mechanism was used to bind copies to processors. The config file option 'submit' was used to generate taskset commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" IRQ balance service was stopped using "systemctl stop irqbalance.service" General Notes ------------- Environment variables set by runcpu before the start of the run: LD_LIBRARY_PATH = "/home/cpu2017/lib/ia32:/home/cpu2017/lib/intel64:/home/cpu2017/je5.0.1-32:/home/cpu2017/je5.0.1-64" Binaries compiled on a system with 1x Intel Core i7-4790 CPU + 32GB RAM memory using Redhat Enterprise Linux 7.4 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3 > /proc/sys/vm/drop_caches jemalloc: configured and built at default for 32bit (i686) and 64bit (x86_64) targets; jemalloc: built with the RedHat Enterprise 7.4, and the system compiler gcc 4.8.5; jemalloc: sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases Yes: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. Platform Notes -------------- BIOS Settings: VT-x: Disabled Sysinfo program /home/cpu2017/bin/sysinfo Rev: r5797 of 2017-06-14 96c45e4568ad54c135fd618bcc091c0f running on t110js Mon Dec 17 10:19:54 2018 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Pentium(R) Gold G5400 CPU @ 3.70GHz 1 "physical id"s (chips) 4 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 2 siblings : 4 physical 0: cores 0 1 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 4 On-line CPU(s) list: 0-3 Thread(s) per core: 2 Core(s) per socket: 2 Socket(s): 1 NUMA node(s): 1 Vendor ID: GenuineIntel CPU family: 6 Model: 158 Model name: Intel(R) Pentium(R) Gold G5400 CPU @ 3.70GHz Stepping: 11 CPU MHz: 3700.000 CPU max MHz: 3700.0000 CPU min MHz: 800.0000 BogoMIPS: 7392.00 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 256K L3 cache: 4096K NUMA node0 CPU(s): 0-3 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx est tm2 ssse3 sdbg cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave rdrand lahf_lm abm 3dnowprefetch epb intel_pt ssbd ibrs ibpb stibp tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust smep erms invpcid mpx rdseed smap clflushopt xsaveopt xsavec xgetbv1 dtherm arat pln pts hwp hwp_notify hwp_act_window hwp_epp spec_ctrl intel_stibp flush_l1d /proc/cpuinfo cache data cache size : 4096 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 1 nodes (0) node 0 cpus: 0 1 2 3 node 0 size: 65455 MB node 0 free: 63589 MB node distances: node 0 0: 10 From /proc/meminfo MemTotal: 65895716 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* os-release: NAME="Red Hat Enterprise Linux Server" VERSION="7.5 (Maipo)" ID="rhel" ID_LIKE="fedora" VARIANT="Server" VARIANT_ID="server" VERSION_ID="7.5" PRETTY_NAME="Red Hat Enterprise Linux Server 7.5 (Maipo)" redhat-release: Red Hat Enterprise Linux Server release 7.5 (Maipo) system-release: Red Hat Enterprise Linux Server release 7.5 (Maipo) system-release-cpe: cpe:/o:redhat:enterprise_linux:7.5:ga:server uname -a: Linux t110js 3.10.0-862.11.6.el7.x86_64 #1 SMP Fri Aug 10 16:55:11 UTC 2018 x86_64 x86_64 x86_64 GNU/Linux run-level 3 Dec 17 10:14 SPEC is set to: /home/cpu2017 Filesystem Type Size Used Avail Use% Mounted on /dev/sda3 ext4 909G 84G 779G 10% / Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS American Megatrends Inc. F07 10/31/2018 Memory: 4x Samsung M391A2K43BB1-CTD 16 GB 2 rank 2667, configured at 2400 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== CC 500.perlbench_r(base) 502.gcc_r(base) 505.mcf_r(base, peak) 525.x264_r(base, peak) 557.xz_r(base, peak) ------------------------------------------------------------------------------ icc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CC 500.perlbench_r(peak) 502.gcc_r(peak) ------------------------------------------------------------------------------ icc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CXXC 520.omnetpp_r(base) 523.xalancbmk_r(base) 531.deepsjeng_r(base) 541.leela_r(base) ------------------------------------------------------------------------------ icpc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CXXC 520.omnetpp_r(peak) 523.xalancbmk_r(peak) 531.deepsjeng_r(peak) 541.leela_r(peak) ------------------------------------------------------------------------------ icpc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== FC 548.exchange2_r(base, peak) ------------------------------------------------------------------------------ ifort (IFORT) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icc -m64 -std=c11 C++ benchmarks: icpc -m64 Fortran benchmarks: ifort -m64 Base Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -DSPEC_LP64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -DSPEC_LP64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -Wl,-z,muldefs -xSSE4.2 -ipo -O3 -no-prec-div -qopt-prefetch -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc C++ benchmarks: -Wl,-z,muldefs -xSSE4.2 -ipo -O3 -no-prec-div -qopt-prefetch -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc Fortran benchmarks: -Wl,-z,muldefs -xSSE4.2 -ipo -O3 -no-prec-div -qopt-prefetch -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte -L/usr/local/je5.0.1-64/lib -ljemalloc Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m64 -std=c11 502.gcc_r: icc -m32 -std=c11 -L/opt/intel/compilers_and_libraries_2018/linux/lib/ia32 C++ benchmarks (except as noted below): icpc -m64 523.xalancbmk_r: icpc -m32 -L/opt/intel/compilers_and_libraries_2018/linux/lib/ia32 Fortran benchmarks: ifort -m64 Peak Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -D_FILE_OFFSET_BITS=64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -D_FILE_OFFSET_BITS=64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Peak Optimization Flags ----------------------- C benchmarks: 500.perlbench_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xSSE4.2 -O3 -no-prec-div -qopt-prefetch -qopt-mem-layout-trans=3 -fno-strict-overflow -L/usr/local/je5.0.1-64/lib -ljemalloc 502.gcc_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xSSE4.2 -O3 -no-prec-div -qopt-prefetch -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-32/lib -ljemalloc 505.mcf_r: basepeak = yes 525.x264_r: -Wl,-z,muldefs -xSSE4.2 -ipo -O3 -no-prec-div -qopt-prefetch -qopt-mem-layout-trans=3 -fno-alias -L/usr/local/je5.0.1-64/lib -ljemalloc 557.xz_r: -Wl,-z,muldefs -xSSE4.2 -ipo -O3 -no-prec-div -qopt-prefetch -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc C++ benchmarks: 520.omnetpp_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xSSE4.2 -O3 -no-prec-div -qopt-prefetch -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc 523.xalancbmk_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xSSE4.2 -O3 -no-prec-div -qopt-prefetch -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-32/lib -ljemalloc 531.deepsjeng_r: Same as 520.omnetpp_r 541.leela_r: Same as 520.omnetpp_r Fortran benchmarks: -Wl,-z,muldefs -xSSE4.2 -ipo -O3 -no-prec-div -qopt-prefetch -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte -L/usr/local/je5.0.1-64/lib -ljemalloc The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2017-12-21.html http://www.spec.org/cpu2017/flags/NEC-Platform-Settings-T110j-RevB.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2017-12-21.xml http://www.spec.org/cpu2017/flags/NEC-Platform-Settings-T110j-RevB.xml SPEC is a registered trademark of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. -------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2019 Standard Performance Evaluation Corporation Tested with SPEC CPU2017 v1.0.2 on 2018-12-16 20:19:53-0500. Report generated on 2019-01-22 16:42:58 by CPU2017 ASCII formatter v6067. Originally published on 2019-01-22.