SPEC(R) CPU2017 Integer Rate Result NEC Corporation Express5800/T110i-S (Intel Core i3-7300) CPU2017 License: 9006 Test date: Nov-2018 Test sponsor: NEC Corporation Hardware availability: Apr-2017 Tested by: NEC Corporation Software availability: Mar-2018 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate --------------- ------- --------- --------- ------- --------- --------- 500.perlbench_r 4 543 11.7 * 4 448 14.2 * 500.perlbench_r 4 536 11.9 S 4 448 14.2 S 500.perlbench_r 4 546 11.7 S 4 448 14.2 S 502.gcc_r 4 387 14.6 S 4 338 16.8 S 502.gcc_r 4 389 14.5 S 4 336 16.9 * 502.gcc_r 4 389 14.6 * 4 335 16.9 S 505.mcf_r 4 331 19.6 * 4 331 19.6 * 505.mcf_r 4 332 19.5 S 4 332 19.5 S 505.mcf_r 4 330 19.6 S 4 330 19.6 S 520.omnetpp_r 4 534 9.84 S 4 534 9.84 S 520.omnetpp_r 4 534 9.82 * 4 534 9.82 * 520.omnetpp_r 4 538 9.75 S 4 538 9.75 S 523.xalancbmk_r 4 267 15.8 S 4 222 19.0 S 523.xalancbmk_r 4 267 15.8 * 4 223 18.9 * 523.xalancbmk_r 4 268 15.8 S 4 223 18.9 S 525.x264_r 4 225 31.1 S 4 210 33.3 * 525.x264_r 4 224 31.3 * 4 209 33.5 S 525.x264_r 4 223 31.4 S 4 212 33.0 S 531.deepsjeng_r 4 343 13.4 S 4 343 13.4 S 531.deepsjeng_r 4 342 13.4 * 4 342 13.4 * 531.deepsjeng_r 4 341 13.4 S 4 341 13.4 S 541.leela_r 4 565 11.7 S 4 556 11.9 S 541.leela_r 4 556 11.9 S 4 554 12.0 * 541.leela_r 4 563 11.8 * 4 547 12.1 S 548.exchange2_r 4 373 28.1 * 4 373 28.1 * 548.exchange2_r 4 371 28.3 S 4 371 28.3 S 548.exchange2_r 4 374 28.0 S 4 374 28.0 S 557.xz_r 4 412 10.5 S 4 412 10.5 S 557.xz_r 4 414 10.4 S 4 414 10.4 S 557.xz_r 4 413 10.5 * 4 413 10.5 * ================================================================================= 500.perlbench_r 4 543 11.7 * 4 448 14.2 * 502.gcc_r 4 389 14.6 * 4 336 16.9 * 505.mcf_r 4 331 19.6 * 4 331 19.6 * 520.omnetpp_r 4 534 9.82 * 4 534 9.82 * 523.xalancbmk_r 4 267 15.8 * 4 223 18.9 * 525.x264_r 4 224 31.3 * 4 210 33.3 * 531.deepsjeng_r 4 342 13.4 * 4 342 13.4 * 541.leela_r 4 563 11.8 * 4 554 12.0 * 548.exchange2_r 4 373 28.1 * 4 373 28.1 * 557.xz_r 4 413 10.5 * 4 413 10.5 * SPECrate2017_int_base 15.4 SPECrate2017_int_peak 16.4 HARDWARE -------- CPU Name: Intel Core i3-7300 Max MHz.: 4000 Nominal: 4000 Enabled: 2 cores, 1 chip, 2 threads/core Orderable: 1 chip Cache L1: 32 KB I + 32 KB D on chip per core L2: 256 KB I+D on chip per core L3: 4 MB I+D on chip per chip Other: None Memory: 64 GB (4 x 16 GB 2Rx8 PC4-2400T-E) Storage: 1 x 1 TB SATA, 7200 RPM Other: None SOFTWARE -------- OS: Red Hat Enterprise Linux Server release 7.4 (Maipo) Kernel 3.10.0-693.21.1.el7.x86_64 Compiler: C/C++: Version 18.0.2.199 of Intel C/C++ Compiler for Linux; Fortran: Version 18.0.2.199 of Intel Fortran Compiler for Linux Parallel: No Firmware: Version 5.0.3006 02/28/2018 released Apr-2018 File System: ext4 System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 32/64-bit Other: jemalloc memory allocator V5.0.1 Submit Notes ------------ The taskset mechanism was used to bind copies to processors. The config file option 'submit' was used to generate taskset commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" General Notes ------------- Environment variables set by runcpu before the start of the run: LD_LIBRARY_PATH = "/home/cpu2017/lib/ia32:/home/cpu2017/lib/intel64:/home/cpu2017/je5.0.1-32:/home/cpu2017/je5.0.1-64" Binaries compiled on a system with 1x Intel Core i7-6700K CPU + 32GB RAM memory using Redhat Enterprise Linux 7.5 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3 > /proc/sys/vm/drop_caches Yes: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. jemalloc, a general purpose malloc implementation built with the RedHat Enterprise 7.5, and the system compiler gcc 4.8.5 sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases Platform Notes -------------- BIOS Settings: Power Management Policy: Custom Energy Performance: Performance DCU Streamer Prefetcher: Disabled Sysinfo program /home/cpu2017/bin/sysinfo Rev: r5974 of 2018-05-19 9bcde8f2999c33d61f64985e45859ea9 running on t110is Wed Nov 14 09:59:44 2018 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Core(TM) i3-7300 CPU @ 4.00GHz 1 "physical id"s (chips) 4 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 2 siblings : 4 physical 0: cores 0 1 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 4 On-line CPU(s) list: 0-3 Thread(s) per core: 2 Core(s) per socket: 2 Socket(s): 1 NUMA node(s): 1 Vendor ID: GenuineIntel CPU family: 6 Model: 158 Model name: Intel(R) Core(TM) i3-7300 CPU @ 4.00GHz Stepping: 9 CPU MHz: 3745.312 CPU max MHz: 4000.0000 CPU min MHz: 800.0000 BogoMIPS: 8016.00 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 256K L3 cache: 4096K NUMA node0 CPU(s): 0-3 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx est tm2 ssse3 fma cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch epb invpcid_single intel_pt spec_ctrl ibpb_support tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 avx2 smep bmi2 erms invpcid mpx rdseed adx smap clflushopt xsaveopt xsavec xgetbv1 dtherm arat pln pts hwp hwp_notify hwp_act_window hwp_epp /proc/cpuinfo cache data cache size : 4096 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 1 nodes (0) node 0 cpus: 0 1 2 3 node 0 size: 65474 MB node 0 free: 63622 MB node distances: node 0 0: 10 From /proc/meminfo MemTotal: 65915016 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* os-release: NAME="Red Hat Enterprise Linux Server" VERSION="7.4 (Maipo)" ID="rhel" ID_LIKE="fedora" VARIANT="Server" VARIANT_ID="server" VERSION_ID="7.4" PRETTY_NAME="Red Hat Enterprise Linux Server 7.4 (Maipo)" redhat-release: Red Hat Enterprise Linux Server release 7.4 (Maipo) system-release: Red Hat Enterprise Linux Server release 7.4 (Maipo) system-release-cpe: cpe:/o:redhat:enterprise_linux:7.4:ga:server uname -a: Linux t110is 3.10.0-693.21.1.el7.x86_64 #1 SMP Fri Feb 23 18:54:16 UTC 2018 x86_64 x86_64 x86_64 GNU/Linux Kernel self-reported vulnerability status: CVE-2017-5754 (Meltdown): Mitigation: PTI CVE-2017-5753 (Spectre variant 1): Mitigation: Load fences CVE-2017-5715 (Spectre variant 2): Mitigation: IBRS (kernel) run-level 3 Nov 14 09:54 SPEC is set to: /home/cpu2017 Filesystem Type Size Used Avail Use% Mounted on /dev/sda3 ext4 909G 117G 746G 14% / Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS American Megatrends Inc. 5.0.3006 02/28/2018 Memory: 4x Micron 18ASF2G72AZ-2G3B1 16 GB 2 rank 2400 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== CC 500.perlbench_r(base) 502.gcc_r(base) 505.mcf_r(base) 525.x264_r(base) 557.xz_r(base) ------------------------------------------------------------------------------ icc (ICC) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CC 500.perlbench_r(peak) 502.gcc_r(peak) 505.mcf_r(peak) 525.x264_r(peak) 557.xz_r(peak) ------------------------------------------------------------------------------ icc (ICC) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CXXC 520.omnetpp_r(base) 523.xalancbmk_r(base) 531.deepsjeng_r(base) 541.leela_r(base) ------------------------------------------------------------------------------ icpc (ICC) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CXXC 520.omnetpp_r(peak) 523.xalancbmk_r(peak) 531.deepsjeng_r(peak) 541.leela_r(peak) ------------------------------------------------------------------------------ icpc (ICC) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== FC 548.exchange2_r(base) ------------------------------------------------------------------------------ ifort (IFORT) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== FC 548.exchange2_r(peak) ------------------------------------------------------------------------------ ifort (IFORT) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icc -m64 -std=c11 C++ benchmarks: icpc -m64 Fortran benchmarks: ifort -m64 Base Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -DSPEC_LP64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -DSPEC_LP64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -Wl,-z,muldefs -xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc C++ benchmarks: -Wl,-z,muldefs -xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc Fortran benchmarks: -Wl,-z,muldefs -xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -L/usr/local/je5.0.1-64/lib -ljemalloc Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m64 -std=c11 502.gcc_r: icc -m32 -std=c11 -L/home/prasadj/specdev/IC18u2_Internal/lin_18_0_20180210/compiler/lib/ia32_lin C++ benchmarks (except as noted below): icpc -m64 523.xalancbmk_r: icpc -m32 -L/home/prasadj/specdev/IC18u2_Internal/lin_18_0_20180210/compiler/lib/ia32_lin Fortran benchmarks: ifort -m64 Peak Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -D_FILE_OFFSET_BITS=64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -D_FILE_OFFSET_BITS=64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Peak Optimization Flags ----------------------- C benchmarks: 500.perlbench_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX2 -O3 -no-prec-div -qopt-mem-layout-trans=3 -fno-strict-overflow -L/usr/local/je5.0.1-64/lib -ljemalloc 502.gcc_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX2 -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-32/lib -ljemalloc 505.mcf_r: basepeak = yes 525.x264_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX2 -O3 -no-prec-div -qopt-mem-layout-trans=3 -fno-alias -L/usr/local/je5.0.1-64/lib -ljemalloc 557.xz_r: basepeak = yes C++ benchmarks: 520.omnetpp_r: basepeak = yes 523.xalancbmk_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX2 -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-32/lib -ljemalloc 531.deepsjeng_r: basepeak = yes 541.leela_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX2 -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc Fortran benchmarks: 548.exchange2_r: basepeak = yes The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2017-12-21.html http://www.spec.org/cpu2017/flags/NEC-Platform-Settings-110i-RevA.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2017-12-21.xml http://www.spec.org/cpu2017/flags/NEC-Platform-Settings-110i-RevA.xml SPEC is a registered trademark of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. -------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2018 Standard Performance Evaluation Corporation Tested with SPEC CPU2017 v1.0.5 on 2018-11-13 19:59:43-0500. Report generated on 2018-12-11 14:54:53 by CPU2017 ASCII formatter v6067. Originally published on 2018-12-11.