SPEC® CPU2017 Floating Point Rate Result

Copyright 2017-2018 Standard Performance Evaluation Corporation

Cisco Systems

Cisco UCS B480 M5 (Intel Xeon Gold 6132
2.60 GHz)

SPECrate2017_fp_base = 34400

SPECrate2017_fp_peak = 35200

CPU2017 License: 9019 Test Date: Oct-2018
Test Sponsor: Cisco Systems Hardware Availability: Aug-2017
Tested by: Cisco Systems Software Availability: Mar-2018

Benchmark result graphs are available in the PDF report.

Hardware
CPU Name: Intel Xeon Gold 6132
  Max MHz.: 3700
  Nominal: 2600
Enabled: 56 cores, 4 chips, 2 threads/core
Orderable: 2,4 Chips
Cache L1: 32 KB I + 32 KB D on chip per core
  L2: 1 MB I+D on chip per core
  L3: 19.25 MB I+D on chip per chip
  Other: None
Memory: 1536 GB (48 x 32 GB 2Rx4 PC4-2666V-R)
Storage: 1 x 400 GB SSD SAS
Other: None
Software
OS: SUSE Linux Enterprise Server 12 SP2 (x86_64)
4.4.103-92.56-default
Compiler: C/C++: Version 18.0.2.199 of Intel C/C++
Compiler for Linux;
Fortran: Version 18.0.2.199 of Intel Fortran
Compiler for Linux
Parallel: No
Firmware: Version 3.2.3c released Mar-2018
File System: xfs
System State: Run level 3 (multi-user)
Base Pointers: 64-bit
Peak Pointers: 64-bit
Other: None

Results Table

Benchmark Base Peak
Copies Seconds Ratio Seconds Ratio Seconds Ratio Copies Seconds Ratio Seconds Ratio Seconds Ratio
SPECrate2017_fp_base 34400
SPECrate2017_fp_peak 35200
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
503.bwaves_r 112 1301 863 1301 863 1301 863 112 1302 863 1301 863 1300 864
507.cactuBSSN_r 112 517 274 518 274 518 274 112 518 273 518 274 518 274
508.namd_r 112 421 253 423 251 423 251 112 418 255 421 253 418 255
510.parest_r 112 1513 194 1522 192 1514 194 112 1517 193 1518 193 1524 192
511.povray_r 112 657 398 656 398 656 399 112 566 462 559 468 561 466
519.lbm_r 112 594 199 594 199 593 199 112 561 211 561 210 561 210
521.wrf_r 112 670 374 677 371 673 373 112 669 375 655 383 654 383
526.blender_r 112 467 365 466 366 467 365 112 466 366 467 365 467 365
527.cam4_r 112 552 355 551 356 553 355 112 536 365 539 364 542 362
538.imagick_r 112 339 822 341 818 339 821 112 339 821 336 828 339 821
544.nab_r 112 324 582 322 586 321 588 112 320 588 321 588 321 587
549.fotonik3d_r 112 1566 279 1564 279 1573 277 112 1561 280 1574 277 1567 278
554.roms_r 112 1116 160 1121 159 1119 159 112 1091 163 1098 162 1092 163

Submit Notes

 The numactl mechanism was used to bind copies to processors. The config file option 'submit'
 was used to generate numactl commands to bind each copy to a specific processor.
 For details, please see the config file.

Operating System Notes

 Stack size set to unlimited using "ulimit -s unlimited"

General Notes

Environment variables set by runcpu before the start of the run:
LD_LIBRARY_PATH = "/opt/cpu2017/lib/ia32:/opt/cpu2017/lib/intel64"

 Binaries compiled on a system with 1x Intel Core i7-6700K CPU + 32GB RAM
 memory using Redhat Enterprise Linux 7.5
 Transparent Huge Pages enabled by default
 Prior to runcpu invocation
 Filesystem page cache synced and cleared with:
 sync; echo 3>       /proc/sys/vm/drop_caches
 runcpu command invoked through numactl i.e.:
 numactl --interleave=all runcpu <etc>
Yes: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown)
is mitigated in the system as tested and documented.
Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1)
is mitigated in the system as tested and documented.
Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2)
is mitigated in the system as tested and documented.

Platform Notes

BIOS Settings:
Intel HyperThreading Technology set to Enabled
CPU performance set to Enterprise
Power Performance Tuning set to OS Controls
SNC set to Enabled
IMC Interleaving set to 1-way Interleave
Patrol Scrub set to Disabled
 Sysinfo program /opt/cpu2017/bin/sysinfo
 Rev: r5797 of 2017-06-14 96c45e4568ad54c135fd618bcc091c0f
 running on linux-vb5q Thu Dec 31 20:17:42 2009

 SUT (System Under Test) info as seen by some common utilities.
 For more information on this section, see
    https://www.spec.org/cpu2017/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : Intel(R) Xeon(R) Gold 6132 CPU @ 2.60GHz
       4  "physical id"s (chips)
       112 "processors"
    cores, siblings (Caution: counting these is hw and system dependent. The following
    excerpts from /proc/cpuinfo might not be reliable.  Use with caution.)
       cpu cores : 14
       siblings  : 28
       physical 0: cores 0 1 2 3 4 5 6 8 9 10 11 12 13 14
       physical 1: cores 0 1 2 3 4 5 6 8 9 10 11 12 13 14
       physical 2: cores 0 1 2 3 4 5 6 8 9 10 11 12 13 14
       physical 3: cores 0 1 2 3 4 5 6 8 9 10 11 12 13 14

 From lscpu:
      Architecture:          x86_64
      CPU op-mode(s):        32-bit, 64-bit
      Byte Order:            Little Endian
      CPU(s):                112
      On-line CPU(s) list:   0-111
      Thread(s) per core:    2
      Core(s) per socket:    14
      Socket(s):             4
      NUMA node(s):          8
      Vendor ID:             GenuineIntel
      CPU family:            6
      Model:                 85
      Model name:            Intel(R) Xeon(R) Gold 6132 CPU @ 2.60GHz
      Stepping:              4
      CPU MHz:               2360.129
      CPU max MHz:           3700.0000
      CPU min MHz:           1000.0000
      BogoMIPS:              5199.99
      Virtualization:        VT-x
      L1d cache:             32K
      L1i cache:             32K
      L2 cache:              1024K
      L3 cache:              19712K
      NUMA node0 CPU(s):     0-3,7-9,56-59,63-65
      NUMA node1 CPU(s):     4-6,10-13,60-62,66-69
      NUMA node2 CPU(s):     14-17,21-23,70-73,77-79
      NUMA node3 CPU(s):     18-20,24-27,74-76,80-83
      NUMA node4 CPU(s):     28-31,35-37,84-87,91-93
      NUMA node5 CPU(s):     32-34,38-41,88-90,94-97
      NUMA node6 CPU(s):     42-45,49-51,98-101,105-107
      NUMA node7 CPU(s):     46-48,52-55,102-104,108-111
      Flags:                 fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
      pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp
      lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc
      aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg
      fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes
      xsave avx f16c rdrand lahf_lm abm 3dnowprefetch ida arat epb invpcid_single pln pts
      dtherm hwp hwp_act_window hwp_epp hwp_pkg_req intel_pt spec_ctrl kaiser tpr_shadow
      vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid
      rtm cqm mpx avx512f avx512dq rdseed adx smap clflushopt clwb avx512cd avx512bw
      avx512vl xsaveopt xsavec xgetbv1 cqm_llc cqm_occup_llc

 /proc/cpuinfo cache data
    cache size : 19712 KB

 From numactl --hardware  WARNING: a numactl 'node' might or might not correspond to a
 physical chip.
   available: 8 nodes (0-7)
   node 0 cpus: 0 1 2 3 7 8 9 56 57 58 59 63 64 65
   node 0 size: 191934 MB
   node 0 free: 191747 MB
   node 1 cpus: 4 5 6 10 11 12 13 60 61 62 66 67 68 69
   node 1 size: 193528 MB
   node 1 free: 193355 MB
   node 2 cpus: 14 15 16 17 21 22 23 70 71 72 73 77 78 79
   node 2 size: 193528 MB
   node 2 free: 193353 MB
   node 3 cpus: 18 19 20 24 25 26 27 74 75 76 80 81 82 83
   node 3 size: 193528 MB
   node 3 free: 193354 MB
   node 4 cpus: 28 29 30 31 35 36 37 84 85 86 87 91 92 93
   node 4 size: 193528 MB
   node 4 free: 193372 MB
   node 5 cpus: 32 33 34 38 39 40 41 88 89 90 94 95 96 97
   node 5 size: 193528 MB
   node 5 free: 193366 MB
   node 6 cpus: 42 43 44 45 49 50 51 98 99 100 101 105 106 107
   node 6 size: 193528 MB
   node 6 free: 193358 MB
   node 7 cpus: 46 47 48 52 53 54 55 102 103 104 108 109 110 111
   node 7 size: 193525 MB
   node 7 free: 193343 MB
   node distances:
   node   0   1   2   3   4   5   6   7
     0:  10  11  21  21  21  21  21  21
     1:  11  10  21  21  21  21  21  21
     2:  21  21  10  11  21  21  21  21
     3:  21  21  11  10  21  21  21  21
     4:  21  21  21  21  10  11  21  21
     5:  21  21  21  21  11  10  21  21
     6:  21  21  21  21  21  21  10  11
     7:  21  21  21  21  21  21  11  10

 From /proc/meminfo
    MemTotal:       1583750024 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 From /etc/*release* /etc/*version*
    SuSE-release:
       SUSE Linux Enterprise Server 12 (x86_64)
       VERSION = 12
       PATCHLEVEL = 2
       # This file is deprecated and will be removed in a future service pack or release.
       # Please check /etc/os-release for details about this release.
    os-release:
       NAME="SLES"
       VERSION="12-SP2"
       VERSION_ID="12.2"
       PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2"
       ID="sles"
       ANSI_COLOR="0;32"
       CPE_NAME="cpe:/o:suse:sles:12:sp2"

 uname -a:
    Linux linux-vb5q 4.4.103-92.56-default #1 SMP Wed Dec 27 16:24:31 UTC 2017 (2fd2155)
    x86_64 x86_64 x86_64 GNU/Linux

 run-level 3 Dec 31 20:09

 SPEC is set to: /opt/cpu2017
    Filesystem     Type  Size  Used Avail Use% Mounted on
    /dev/sda1      xfs   280G   77G  203G  28% /

 Additional information from dmidecode follows.  WARNING: Use caution when you interpret
 this section. The 'dmidecode' program reads system data which is "intended to allow
 hardware to be accurately determined", but the intent may not be met, as there are
 frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard.
   BIOS Cisco Systems, Inc. B480M5.3.2.3c.0.0307181316 03/07/2018
   Memory:
    48x 0xCE00 M393A4K40BB2-CTD 32 GB 2 rank 2666

 (End of data from sysinfo program)

Compiler Version Notes

==============================================================================
 CC  519.lbm_r(base) 538.imagick_r(base, peak) 544.nab_r(base, peak)
------------------------------------------------------------------------------
icc (ICC) 18.0.2 20180210
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
CC   519.lbm_r(peak)
------------------------------------------------------------------------------
icc (ICC) 18.0.2 20180210
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
 CXXC 508.namd_r(base) 510.parest_r(base, peak)
------------------------------------------------------------------------------
icpc (ICC) 18.0.2 20180210
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
CXXC 508.namd_r(peak)
------------------------------------------------------------------------------
icpc (ICC) 18.0.2 20180210
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
 CC  511.povray_r(base) 526.blender_r(base, peak)
------------------------------------------------------------------------------
icpc (ICC) 18.0.2 20180210
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
icc (ICC) 18.0.2 20180210
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
CC   511.povray_r(peak)
------------------------------------------------------------------------------
icpc (ICC) 18.0.2 20180210
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
icc (ICC) 18.0.2 20180210
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
 FC  507.cactuBSSN_r(base, peak)
------------------------------------------------------------------------------
icpc (ICC) 18.0.2 20180210
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
icc (ICC) 18.0.2 20180210
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
ifort (IFORT) 18.0.2 20180210
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
 FC  503.bwaves_r(base, peak) 549.fotonik3d_r(base, peak) 554.roms_r(base)
------------------------------------------------------------------------------
ifort (IFORT) 18.0.2 20180210
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
FC   554.roms_r(peak)
------------------------------------------------------------------------------
ifort (IFORT) 18.0.2 20180210
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
 CC  521.wrf_r(base) 527.cam4_r(base)
------------------------------------------------------------------------------
ifort (IFORT) 18.0.2 20180210
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
icc (ICC) 18.0.2 20180210
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
CC   521.wrf_r(peak) 527.cam4_r(peak)
------------------------------------------------------------------------------
ifort (IFORT) 18.0.2 20180210
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
icc (ICC) 18.0.2 20180210
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

Base Compiler Invocation

C benchmarks:

 icc -m64 -std=c11 

C++ benchmarks:

 icpc -m64 

Fortran benchmarks:

 ifort -m64 

Benchmarks using both Fortran and C:

 ifort -m64   icc -m64 -std=c11 

Benchmarks using both C and C++:

 icpc -m64   icc -m64 -std=c11 

Benchmarks using Fortran, C, and C++:

 icpc -m64   icc -m64 -std=c11   ifort -m64 

Base Portability Flags

503.bwaves_r:  -DSPEC_LP64 
507.cactuBSSN_r:  -DSPEC_LP64 
508.namd_r:  -DSPEC_LP64 
510.parest_r:  -DSPEC_LP64 
511.povray_r:  -DSPEC_LP64 
519.lbm_r:  -DSPEC_LP64 
521.wrf_r:  -DSPEC_LP64   -DSPEC_CASE_FLAG   -convert big_endian 
526.blender_r:  -DSPEC_LP64   -DSPEC_LINUX   -funsigned-char 
527.cam4_r:  -DSPEC_LP64   -DSPEC_CASE_FLAG 
538.imagick_r:  -DSPEC_LP64 
544.nab_r:  -DSPEC_LP64 
549.fotonik3d_r:  -DSPEC_LP64 
554.roms_r:  -DSPEC_LP64 

Base Optimization Flags

C benchmarks:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=3 

C++ benchmarks:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=3 

Fortran benchmarks:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=3   -auto   -nostandard-realloc-lhs 

Benchmarks using both Fortran and C:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=3   -auto   -nostandard-realloc-lhs 

Benchmarks using both C and C++:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=3 

Benchmarks using Fortran, C, and C++:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=3   -auto   -nostandard-realloc-lhs 

Peak Compiler Invocation

C benchmarks:

 icc -m64 -std=c11 

C++ benchmarks:

 icpc -m64 

Fortran benchmarks:

 ifort -m64 

Benchmarks using both Fortran and C:

 ifort -m64   icc -m64 -std=c11 

Benchmarks using both C and C++:

 icpc -m64   icc -m64 -std=c11 

Benchmarks using Fortran, C, and C++:

 icpc -m64   icc -m64 -std=c11   ifort -m64 

Peak Portability Flags

Same as Base Portability Flags

Peak Optimization Flags

C benchmarks:

519.lbm_r:  -prof-gen(pass 1)   -prof-use(pass 2)   -ipo   -xCORE-AVX2   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=3 
538.imagick_r:  -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=3 
544.nab_r:  Same as 538.imagick_r 

C++ benchmarks:

508.namd_r:  -prof-gen(pass 1)   -prof-use(pass 2)   -ipo   -xCORE-AVX2   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=3 
510.parest_r:  -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=3 

Fortran benchmarks:

503.bwaves_r:  -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=3   -auto   -nostandard-realloc-lhs 
549.fotonik3d_r:  Same as 503.bwaves_r 
554.roms_r:  -prof-gen(pass 1)   -prof-use(pass 2)   -ipo   -xCORE-AVX2   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=3   -auto   -nostandard-realloc-lhs 

Benchmarks using both Fortran and C:

 -prof-gen(pass 1)   -prof-use(pass 2)   -ipo   -xCORE-AVX2   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=3   -auto   -nostandard-realloc-lhs 

Benchmarks using both C and C++:

511.povray_r:  -prof-gen(pass 1)   -prof-use(pass 2)   -ipo   -xCORE-AVX2   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=3 
526.blender_r:  -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=3 

Benchmarks using Fortran, C, and C++:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=3   -auto   -nostandard-realloc-lhs 

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2017-12-21.html,
http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revH.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2017-12-21.xml,
http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revH.xml.