SPEC(R) CPU2017 Integer Rate Result Supermicro SuperServer 5019P-MT (X11SPi-TF , Intel Xeon Silver 4114T) CPU2017 License: 001176 Test date: Oct-2018 Test sponsor: Supermicro Hardware availability: Jul-2017 Tested by: Supermicro Software availability: Mar-2018 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate --------------- ------- --------- --------- ------- --------- --------- 500.perlbench_r 20 865 36.8 S 20 726 43.9 S 500.perlbench_r 20 872 36.5 S 20 725 43.9 * 500.perlbench_r 20 868 36.7 * 20 724 44.0 S 502.gcc_r 20 703 40.3 * 20 588 48.2 S 502.gcc_r 20 703 40.3 S 20 591 47.9 S 502.gcc_r 20 709 40.0 S 20 590 48.0 * 505.mcf_r 20 548 59.0 S 20 548 59.0 S 505.mcf_r 20 549 58.9 * 20 549 58.9 * 505.mcf_r 20 567 57.0 S 20 567 57.0 S 520.omnetpp_r 20 876 30.0 S 20 876 30.0 S 520.omnetpp_r 20 873 30.1 * 20 873 30.1 * 520.omnetpp_r 20 871 30.1 S 20 871 30.1 S 523.xalancbmk_r 20 493 42.8 * 20 391 54.0 S 523.xalancbmk_r 20 493 42.8 S 20 393 53.8 S 523.xalancbmk_r 20 493 42.8 S 20 391 54.0 * 525.x264_r 20 374 93.8 * 20 368 95.1 S 525.x264_r 20 373 93.8 S 20 364 96.1 * 525.x264_r 20 374 93.6 S 20 363 96.4 S 531.deepsjeng_r 20 555 41.3 S 20 555 41.3 S 531.deepsjeng_r 20 554 41.4 S 20 554 41.4 S 531.deepsjeng_r 20 554 41.4 * 20 554 41.4 * 541.leela_r 20 861 38.5 S 20 850 39.0 S 541.leela_r 20 865 38.3 S 20 847 39.1 S 541.leela_r 20 864 38.3 * 20 847 39.1 * 548.exchange2_r 20 596 87.9 * 20 596 87.9 * 548.exchange2_r 20 597 87.8 S 20 597 87.8 S 548.exchange2_r 20 596 88.0 S 20 596 88.0 S 557.xz_r 20 644 33.5 * 20 644 33.5 * 557.xz_r 20 644 33.6 S 20 644 33.6 S 557.xz_r 20 646 33.5 S 20 646 33.5 S ================================================================================= 500.perlbench_r 20 868 36.7 * 20 725 43.9 * 502.gcc_r 20 703 40.3 * 20 590 48.0 * 505.mcf_r 20 549 58.9 * 20 549 58.9 * 520.omnetpp_r 20 873 30.1 * 20 873 30.1 * 523.xalancbmk_r 20 493 42.8 * 20 391 54.0 * 525.x264_r 20 374 93.8 * 20 364 96.1 * 531.deepsjeng_r 20 554 41.4 * 20 554 41.4 * 541.leela_r 20 864 38.3 * 20 847 39.1 * 548.exchange2_r 20 596 87.9 * 20 596 87.9 * 557.xz_r 20 644 33.5 * 20 644 33.5 * SPECrate2017_int_base 46.7 SPECrate2017_int_peak 49.7 HARDWARE -------- CPU Name: Intel Xeon Silver 4114T Max MHz.: 3000 Nominal: 2200 Enabled: 10 cores, 1 chip, 2 threads/core Orderable: 1 chip Cache L1: 32 KB I + 32 KB D on chip per core L2: 1 MB I+D on chip per core L3: 13.75 MB I+D on chip per chip Other: None Memory: 192 GB (6 x 32 GB 2Rx4 PC4-2666V-R, running at 2400) Storage: 1 x 200 GB SATA III SSD Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Server 12 SP3 (x86_64) Kernel 4.4.114-94.11-default Compiler: C/C++: Version 18.0.2.199 of Intel C/C++ Compiler for Linux; Fortran: Version 18.0.2.199 of Intel Fortran Compiler for Linux Parallel: No Firmware: Supermicro BIOS version 2.1 released Jun-2018 File System: xfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 32/64-bit Other: jemalloc memory allocator library V5.0.1 Submit Notes ------------ The taskset mechanism was used to bind copies to processors. The config file option 'submit' was used to generate taskset commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" General Notes ------------- Environment variables set by runcpu before the start of the run: LD_LIBRARY_PATH = "/home/cpu2017/lib/ia32:/home/cpu2017/lib/intel64:/home/cpu2017/je5.0.1-32:/home/cpu2017/je5.0.1-64" Binaries compiled on a system with 1x Intel Core i7-6700K CPU + 32GB RAM memory using Redhat Enterprise Linux 7.5 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches Yes: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. jemalloc, a general purpose malloc implementation built with the RedHat Enterprise 7.5, and the system compiler gcc 4.8.5 sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases Platform Notes -------------- BIOS Settings: LLC prefetch = Enable Power Technology = Custom Power Performance Tuning = BIOS Controls EPB ENERGY_PERF_BIAS_CFG mode = Maximum Performance Hardware P-state = Out of Band Mode XPT Prefetch = Enable Stale AtoS = Enable LLC dead line alloc = Disable Patrol Scrub = Disable Sysinfo program /home/cpu2017/bin/sysinfo Rev: r5974 of 2018-05-19 9bcde8f2999c33d61f64985e45859ea9 running on linux-cyyj Wed Oct 24 15:28:07 2018 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Silver 4114T CPU @ 2.20GHz 1 "physical id"s (chips) 20 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 10 siblings : 20 physical 0: cores 0 1 2 3 4 8 9 10 11 12 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 20 On-line CPU(s) list: 0-19 Thread(s) per core: 2 Core(s) per socket: 10 Socket(s): 1 NUMA node(s): 1 Vendor ID: GenuineIntel CPU family: 6 Model: 85 Model name: Intel(R) Xeon(R) Silver 4114T CPU @ 2.20GHz Stepping: 4 CPU MHz: 2200.001 BogoMIPS: 4400.00 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 1024K L3 cache: 14080K NUMA node0 CPU(s): 0-19 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch ida arat epb invpcid_single pln pts dtherm hwp_epp intel_pt rsb_ctxsw spec_ctrl retpoline kaiser tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx avx512f avx512dq rdseed adx smap clflushopt clwb avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 cqm_llc cqm_occup_llc pku ospke /proc/cpuinfo cache data cache size : 14080 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 1 nodes (0) node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 node 0 size: 192078 MB node 0 free: 191338 MB node distances: node 0 0: 10 From /proc/meminfo MemTotal: 196688068 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 3 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP3" VERSION_ID="12.3" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP3" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp3" uname -a: Linux linux-cyyj 4.4.114-94.11-default #1 SMP Thu Feb 1 19:28:26 UTC 2018 (4309ff9) x86_64 x86_64 x86_64 GNU/Linux Kernel self-reported vulnerability status: CVE-2017-5754 (Meltdown): Mitigation: PTI CVE-2017-5753 (Spectre variant 1): Mitigation: Barriers CVE-2017-5715 (Spectre variant 2): Mitigation: IBRS+IBPB run-level 3 Oct 24 15:15 SPEC is set to: /home/cpu2017 Filesystem Type Size Used Avail Use% Mounted on /dev/sda3 xfs 145G 64G 81G 45% /home Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS American Megatrends Inc. 2.1 06/14/2018 Memory: 2x NO DIMM NO DIMM 6x Samsung M393A4K40BB2-CTD 32 GB 2 rank 2666, configured at 2400 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== CC 500.perlbench_r(base) 502.gcc_r(base) 505.mcf_r(base) 525.x264_r(base) 557.xz_r(base) ------------------------------------------------------------------------------ icc (ICC) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CC 500.perlbench_r(peak) 502.gcc_r(peak) 505.mcf_r(peak) 525.x264_r(peak) 557.xz_r(peak) ------------------------------------------------------------------------------ icc (ICC) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CXXC 520.omnetpp_r(base) 523.xalancbmk_r(base) 531.deepsjeng_r(base) 541.leela_r(base) ------------------------------------------------------------------------------ icpc (ICC) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CXXC 520.omnetpp_r(peak) 523.xalancbmk_r(peak) 531.deepsjeng_r(peak) 541.leela_r(peak) ------------------------------------------------------------------------------ icpc (ICC) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== FC 548.exchange2_r(base) ------------------------------------------------------------------------------ ifort (IFORT) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== FC 548.exchange2_r(peak) ------------------------------------------------------------------------------ ifort (IFORT) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icc -m64 -std=c11 C++ benchmarks: icpc -m64 Fortran benchmarks: ifort -m64 Base Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -DSPEC_LP64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -DSPEC_LP64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc C++ benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc Fortran benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -L/usr/local/je5.0.1-64/lib -ljemalloc Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m64 -std=c11 502.gcc_r: icc -m32 -std=c11 -L/home/prasadj/specdev/IC18u2_Internal/lin_18_0_20180210/compiler/lib/ia32_lin C++ benchmarks (except as noted below): icpc -m64 523.xalancbmk_r: icpc -m32 -L/home/prasadj/specdev/IC18u2_Internal/lin_18_0_20180210/compiler/lib/ia32_lin Fortran benchmarks: ifort -m64 Peak Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -D_FILE_OFFSET_BITS=64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -D_FILE_OFFSET_BITS=64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Peak Optimization Flags ----------------------- C benchmarks: 500.perlbench_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -fno-strict-overflow -L/usr/local/je5.0.1-64/lib -ljemalloc 502.gcc_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-32/lib -ljemalloc 505.mcf_r: basepeak = yes 525.x264_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -fno-alias -L/usr/local/je5.0.1-64/lib -ljemalloc 557.xz_r: basepeak = yes C++ benchmarks: 520.omnetpp_r: basepeak = yes 523.xalancbmk_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-32/lib -ljemalloc 531.deepsjeng_r: basepeak = yes 541.leela_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc Fortran benchmarks: 548.exchange2_r: basepeak = yes The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2017-12-21.html http://www.spec.org/cpu2017/flags/Supermicro-Platform-Settings-V1.2-SKL-revD.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2017-12-21.xml http://www.spec.org/cpu2017/flags/Supermicro-Platform-Settings-V1.2-SKL-revD.xml SPEC is a registered trademark of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. -------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2018 Standard Performance Evaluation Corporation Tested with SPEC CPU2017 v1.0.5 on 2018-10-24 03:28:06-0400. Report generated on 2018-11-13 15:14:08 by CPU2017 ASCII formatter v6067. Originally published on 2018-11-13.