SPEC CPU(R)2017 Floating Point Speed Result Cisco Systems Cisco UCS B200 M5 (Intel Xeon Silver 4110, 2.10 GHz) CPU2017 License: 9019 Test date: Dec-2017 Test sponsor: Cisco Systems Hardware availability: Aug-2017 Tested by: Cisco Systems Software availability: Sep-2017 Base Base Base Peak Peak Peak Benchmarks Threads Run Time Ratio Threads Run Time Ratio --------------- ------- --------- --------- ------- --------- --------- 603.bwaves_s 16 179 329 * 16 179 329 S 603.bwaves_s 16 180 328 S 16 180 328 S 603.bwaves_s 16 179 329 S 16 180 328 * 607.cactuBSSN_s 16 227 73.5 S 16 225 74.0 S 607.cactuBSSN_s 16 227 73.5 * 16 224 74.5 S 607.cactuBSSN_s 16 226 73.9 S 16 224 74.4 * 619.lbm_s 16 155 33.7 * 16 156 33.7 S 619.lbm_s 16 155 33.8 S 16 155 33.7 S 619.lbm_s 16 155 33.7 S 16 156 33.7 * 621.wrf_s 16 294 45.0 * 16 292 45.3 * 621.wrf_s 16 299 44.2 S 16 296 44.8 S 621.wrf_s 16 289 45.8 S 16 290 45.6 S 627.cam4_s 16 358 24.8 * 16 359 24.7 S 627.cam4_s 16 357 24.8 S 16 358 24.8 * 627.cam4_s 16 359 24.7 S 16 358 24.8 S 628.pop2_s 16 256 46.3 * 16 250 47.5 S 628.pop2_s 16 256 46.3 S 16 249 47.6 * 628.pop2_s 16 255 46.5 S 16 249 47.7 S 638.imagick_s 16 342 42.2 S 16 342 42.2 S 638.imagick_s 16 342 42.2 * 16 340 42.4 S 638.imagick_s 16 341 42.2 S 16 341 42.4 * 644.nab_s 16 234 74.5 S 16 235 74.5 S 644.nab_s 16 234 74.5 * 16 234 74.6 S 644.nab_s 16 235 74.5 S 16 235 74.5 * 649.fotonik3d_s 16 143 63.7 S 16 144 63.4 S 649.fotonik3d_s 16 146 62.5 S 16 144 63.3 * 649.fotonik3d_s 16 145 62.9 * 16 146 62.5 S 654.roms_s 16 233 67.5 S 16 221 71.3 * 654.roms_s 16 234 67.2 S 16 221 71.3 S 654.roms_s 16 234 67.2 * 16 221 71.4 S ================================================================================= 603.bwaves_s 16 179 329 * 16 180 328 * 607.cactuBSSN_s 16 227 73.5 * 16 224 74.4 * 619.lbm_s 16 155 33.7 * 16 156 33.7 * 621.wrf_s 16 294 45.0 * 16 292 45.3 * 627.cam4_s 16 358 24.8 * 16 358 24.8 * 628.pop2_s 16 256 46.3 * 16 249 47.6 * 638.imagick_s 16 342 42.2 * 16 341 42.4 * 644.nab_s 16 234 74.5 * 16 235 74.5 * 649.fotonik3d_s 16 145 62.9 * 16 144 63.3 * 654.roms_s 16 234 67.2 * 16 221 71.3 * SPECspeed(R)2017_fp_base 59.5 SPECspeed(R)2017_fp_peak 60.2 HARDWARE -------- CPU Name: Intel Xeon Silver 4110 Max MHz: 3000 Nominal: 2100 Enabled: 16 cores, 2 chips Orderable: 1,2 Chips Cache L1: 32 KB I + 32 KB D on chip per core L2: 1 MB I+D on chip per core L3: 11 MB I+D on chip per chip Other: None Memory: 384 GB (24 x 16 GB 2Rx4 PC4-2666V-R, running at 2400) Storage: 1 x 600 GB SAS HDD, 10K RPM Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Server 12 SP2 (x86_64) 4.4.21-69-default Compiler: C/C++: Version 18.0.0.128 of Intel C/C++ Compiler for Linux; Fortran: Version 18.0.0.128 of Intel Fortran Compiler for Linux Parallel: Yes Firmware: Version 3.2.1d released Jul-2017 File System: xfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 64-bit Other: None Power Management: -- Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" General Notes ------------- Environment variables set by runcpu before the start of the run: KMP_AFFINITY = "granularity=fine,compact" LD_LIBRARY_PATH = "/home/cpu2017/lib/ia32:/home/cpu2017/lib/intel64:/home/cpu2017/je5.0.1-32:/home/cpu2017/je5.0.1-64" OMP_STACKSIZE = "192M" Binaries compiled on a system with 1x Intel Core i7-4790 CPU + 32GB RAM memory using Redhat Enterprise Linux 7.4 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches Platform Notes -------------- BIOS Settings: Intel HyperThreading Technology set to Disabled CPU performance set to Enterprise Power Performance Tuning set to OS SNC set to Disabled IMC Interleaving set to Auto Patrol Scrub set to Disabled Sysinfo program /home/cpu2017/bin/sysinfo Rev: r5797 of 2017-06-14 96c45e4568ad54c135fd618bcc091c0f running on linux-qc7k Fri Dec 1 06:55:13 2017 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Silver 4110 CPU @ 2.10GHz 2 "physical id"s (chips) 16 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 8 siblings : 8 physical 0: cores 0 1 2 3 4 5 6 7 physical 1: cores 0 1 2 3 4 5 6 7 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 16 On-line CPU(s) list: 0-15 Thread(s) per core: 1 Core(s) per socket: 8 Socket(s): 2 NUMA node(s): 2 Vendor ID: GenuineIntel CPU family: 6 Model: 85 Model name: Intel(R) Xeon(R) Silver 4110 CPU @ 2.10GHz Stepping: 4 CPU MHz: 1209.905 CPU max MHz: 3000.0000 CPU min MHz: 800.0000 BogoMIPS: 4200.00 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 1024K L3 cache: 11264K NUMA node0 CPU(s): 0-7 NUMA node1 CPU(s): 8-15 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch ida arat epb pln pts dtherm hwp hwp_act_window hwp_epp hwp_pkg_req intel_pt tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx avx512f avx512dq rdseed adx smap clflushopt clwb avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 cqm_llc cqm_occup_llc /proc/cpuinfo cache data cache size : 11264 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 2 nodes (0-1) node 0 cpus: 0 1 2 3 4 5 6 7 node 0 size: 192830 MB node 0 free: 190311 MB node 1 cpus: 8 9 10 11 12 13 14 15 node 1 size: 193504 MB node 1 free: 187608 MB node distances: node 0 1 0: 10 21 1: 21 10 From /proc/meminfo MemTotal: 395606600 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 2 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP2" VERSION_ID="12.2" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp2" uname -a: Linux linux-qc7k 4.4.21-69-default #1 SMP Tue Oct 25 10:58:20 UTC 2016 (9464f67) x86_64 x86_64 x86_64 GNU/Linux run-level 3 Jan 8 05:16 SPEC is set to: /home/cpu2017 Filesystem Type Size Used Avail Use% Mounted on /dev/sda1 xfs 224G 68G 156G 31% / Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS Cisco Systems, Inc. B200M5.3.2.1d.5.0727171353 07/27/2017 Memory: 24x 0xCE00 M393A2G40EB2-CTD 16 GB 2 rank 2666, configured at 2400 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== C | 619.lbm_s(base, peak) 638.imagick_s(base, peak) | 644.nab_s(base, peak) ------------------------------------------------------------------------------ icc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++, C, Fortran | 607.cactuBSSN_s(base, peak) ------------------------------------------------------------------------------ icpc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. icc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ifort (IFORT) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran | 603.bwaves_s(base, peak) 649.fotonik3d_s(base, peak) | 654.roms_s(base, peak) ------------------------------------------------------------------------------ ifort (IFORT) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran, C | 621.wrf_s(base, peak) 627.cam4_s(base, peak) | 628.pop2_s(base, peak) ------------------------------------------------------------------------------ ifort (IFORT) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. icc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icc Fortran benchmarks: ifort Benchmarks using both Fortran and C: ifort icc Benchmarks using Fortran, C, and C++: icpc icc ifort Base Portability Flags ---------------------- 603.bwaves_s: -DSPEC_LP64 607.cactuBSSN_s: -DSPEC_LP64 619.lbm_s: -DSPEC_LP64 621.wrf_s: -DSPEC_LP64 -DSPEC_CASE_FLAG -convert big_endian 627.cam4_s: -DSPEC_LP64 -DSPEC_CASE_FLAG 628.pop2_s: -DSPEC_LP64 -DSPEC_CASE_FLAG -convert big_endian -assume byterecl 638.imagick_s: -DSPEC_LP64 644.nab_s: -DSPEC_LP64 649.fotonik3d_s: -DSPEC_LP64 654.roms_s: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 -qopenmp -DSPEC_OPENMP Fortran benchmarks: -DSPEC_OPENMP -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 -qopenmp -nostandard-realloc-lhs -align array32byte Benchmarks using both Fortran and C: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 -qopenmp -DSPEC_OPENMP -nostandard-realloc-lhs -align array32byte Benchmarks using Fortran, C, and C++: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 -qopenmp -DSPEC_OPENMP -nostandard-realloc-lhs -align array32byte Base Other Flags ---------------- C benchmarks: -m64 -std=c11 Fortran benchmarks: -m64 Benchmarks using both Fortran and C: -m64 -std=c11 Benchmarks using Fortran, C, and C++: -m64 -std=c11 Peak Compiler Invocation ------------------------ C benchmarks: icc Fortran benchmarks: ifort Benchmarks using both Fortran and C: ifort icc Benchmarks using Fortran, C, and C++: icpc icc ifort Peak Portability Flags ---------------------- Same as Base Portability Flags Peak Optimization Flags ----------------------- C benchmarks: 619.lbm_s: -prof-gen(pass 1) -prof-use(pass 2) -O2 -xCORE-AVX512 -qopt-prefetch -ipo -O3 -ffinite-math-only -no-prec-div -qopt-mem-layout-trans=3 -DSPEC_SUPPRESS_OPENMP -qopenmp -DSPEC_OPENMP 638.imagick_s: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 -qopenmp -DSPEC_OPENMP 644.nab_s: Same as 638.imagick_s Fortran benchmarks: -prof-gen(pass 1) -prof-use(pass 2) -DSPEC_SUPPRESS_OPENMP -DSPEC_OPENMP -O2 -xCORE-AVX512 -qopt-prefetch -ipo -O3 -ffinite-math-only -no-prec-div -qopt-mem-layout-trans=3 -qopenmp -nostandard-realloc-lhs -align array32byte Benchmarks using both Fortran and C: 621.wrf_s: -prof-gen(pass 1) -prof-use(pass 2) -O2 -xCORE-AVX512 -qopt-prefetch -ipo -O3 -ffinite-math-only -no-prec-div -qopt-mem-layout-trans=3 -DSPEC_SUPPRESS_OPENMP -qopenmp -DSPEC_OPENMP -nostandard-realloc-lhs -align array32byte 627.cam4_s: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 -qopenmp -DSPEC_OPENMP -nostandard-realloc-lhs -align array32byte 628.pop2_s: Same as 621.wrf_s Benchmarks using Fortran, C, and C++: -prof-gen(pass 1) -prof-use(pass 2) -O2 -xCORE-AVX512 -qopt-prefetch -ipo -O3 -ffinite-math-only -no-prec-div -qopt-mem-layout-trans=3 -DSPEC_SUPPRESS_OPENMP -qopenmp -DSPEC_OPENMP -nostandard-realloc-lhs -align array32byte Peak Other Flags ---------------- C benchmarks: -m64 -std=c11 Fortran benchmarks: -m64 Benchmarks using both Fortran and C: -m64 -std=c11 Benchmarks using Fortran, C, and C++: -m64 -std=c11 The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.html http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revH.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.xml http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revH.xml SPEC CPU and SPECspeed are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ---------------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2020 Standard Performance Evaluation Corporation Tested with SPEC CPU(R)2017 v1.0.2 on 2017-12-01 06:55:12-0500. Report generated on 2020-06-25 18:23:35 by CPU2017 text formatter v6255. Originally published on 2017-12-26.