SPEC® CFP2006 Result

Copyright 2006-2018 Standard Performance Evaluation Corporation

Cisco Systems

Cisco UCS C220 M5 (Intel Xeon Silver 4108,
1.80 GHz)

CPU2006 license: 9019 Test date: Dec-2017
Test sponsor: Cisco Systems Hardware Availability: Aug-2017
Tested by: Cisco Systems Software Availability: Jun-2017
Benchmark results graph
Hardware
CPU Name: Intel Xeon Silver 4108
CPU Characteristics: Intel Turbo Boost Technology up to 3.00 GHz
CPU MHz: 1800
FPU: Integrated
CPU(s) enabled: 16 cores, 2 chips, 8 cores/chip, 2 threads/core
CPU(s) orderable: 1,2 chips
Primary Cache: 32 KB I + 32 KB D on chip per core
Secondary Cache: 1 MB I+D on chip per core
L3 Cache: 11 MB I+D on chip per chip
Other Cache: None
Memory: 384 GB (24 x 16 GB 2Rx4 PC4-2666V-R,
running at 2400)
Disk Subsystem: 1 x 600 GB SAS HDD, 10K RPM
Other Hardware: None
Software
Operating System: SUSE Linux Enterprise Server 12 SP2 (x86_64)
4.4.21-69-default
Compiler: C/C++: Version 17.0.3.191 of Intel C/C++
Compiler for Linux;
Fortran: Version 17.0.3.191 of Intel Fortran
Compiler for Linux
Auto Parallel: Yes
File System: xfs
System State: Run level 3 (multi-user)
Base Pointers: 32/64-bit
Peak Pointers: 32/64-bit
Other Software: None

Results Table

Benchmark Base Peak
Copies Seconds Ratio Seconds Ratio Seconds Ratio Copies Seconds Ratio Seconds Ratio Seconds Ratio
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
410.bwaves 32 600 725 600 725 600 725 32 600 725 600 725 599 726
416.gamess 32 1267 495 1266 495 1267 494 32 1226 511 1227 511 1225 511
433.milc 32 387 759 387 759 387 759 32 387 759 387 759 387 759
434.zeusmp 32 368 791 366 797 363 802 32 368 791 366 797 363 802
435.gromacs 32 384 595 387 590 381 600 32 385 593 373 612 385 593
436.cactusADM 32 479 799 476 804 478 799 32 479 799 476 804 478 799
437.leslie3d 32 607 496 608 495 609 494 32 607 495 607 495 607 496
444.namd 32 636 403 636 403 636 404 32 632 406 629 408 632 406
447.dealII 32 437 837 433 845 434 843 32 437 837 433 845 434 843
450.soplex 32 574 465 574 465 572 466 32 550 485 549 486 556 480
453.povray 32 237 720 237 717 237 717 32 206 827 206 825 206 827
454.calculix 32 344 767 347 760 343 770 32 344 767 347 760 343 770
459.GemsFDTD 32 747 455 747 454 748 454 32 747 454 746 455 748 454
465.tonto 32 551 571 551 571 551 571 32 525 599 525 599 524 600
470.lbm 32 500 879 500 879 499 881 32 500 879 500 879 499 881
481.wrf 32 447 800 446 801 451 793 32 447 800 446 801 451 793
482.sphinx3 32 1154 540 1150 542 1154 540 32 1154 540 1150 542 1154 540

Submit Notes

 The numactl mechanism was used to bind copies to processors. The config file option 'submit'
 was used to generate numactl commands to bind each copy to a specific processor.
 For details, please see the config file.

Operating System Notes

 Stack size set to unlimited using "ulimit -s unlimited"

Platform Notes

BIOS Settings:
Intel HyperThreading Technology set to Enabled
CPU performance set to Enterprise
Power Performance Tuning set to OS Controls
SNC set to Enabled
IMC Interleaving set to 1-way Interleave
Patrol Scrub set to Disabled
 Sysinfo program /home/cpu2006-1.2/config/sysinfo.rev6993
 Revision 6993 of 2015-11-06 (b5e8d4b4eb51ed28d7f98696cbe290c1)
 running on linux-3joc Thu Dec 14 18:10:48 2017

 This section contains SUT (System Under Test) info as seen by
 some common utilities.  To remove or add to this section, see:
   http://www.spec.org/cpu2006/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : Intel(R) Xeon(R) Silver 4108 CPU @ 1.80GHz
       2 "physical id"s (chips)
       32 "processors"
    cores, siblings (Caution: counting these is hw and system dependent.  The
    following excerpts from /proc/cpuinfo might not be reliable.  Use with
    caution.)
       cpu cores : 8
       siblings  : 16
       physical 0: cores 0 1 2 3 4 5 6 7
       physical 1: cores 0 1 2 3 4 5 6 7
    cache size : 11264 KB

 From /proc/meminfo
    MemTotal:       394864760 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 /usr/bin/lsb_release -d
    SUSE Linux Enterprise Server 12 SP2

 From /etc/*release* /etc/*version*
    SuSE-release:
       SUSE Linux Enterprise Server 12 (x86_64)
       VERSION = 12
       PATCHLEVEL = 2
       # This file is deprecated and will be removed in a future service pack or
       release.
       # Please check /etc/os-release for details about this release.
    os-release:
       NAME="SLES"
       VERSION="12-SP2"
       VERSION_ID="12.2"
       PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2"
       ID="sles"
       ANSI_COLOR="0;32"
       CPE_NAME="cpe:/o:suse:sles:12:sp2"

 uname -a:
    Linux linux-3joc 4.4.21-69-default #1 SMP Tue Oct 25 10:58:20 UTC 2016
    (9464f67) x86_64 x86_64 x86_64 GNU/Linux

 run-level 3 Dec 14 03:38

 SPEC is set to: /home/cpu2006-1.2
    Filesystem     Type  Size  Used Avail Use% Mounted on
    /dev/sda3      xfs   516G  114G  403G  22% /home
 Additional information from dmidecode:

    Warning: Use caution when you interpret this section. The 'dmidecode' program
    reads system data which is "intended to allow hardware to be accurately
    determined", but the intent may not be met, as there are frequent changes to
    hardware, firmware, and the "DMTF SMBIOS" standard.

   BIOS Cisco Systems, Inc. C220M5.3.1.1d.0.0615170645 06/15/2017
   Memory:
    24x 0xCE00 M393A2G40EB2-CTD 16 GB 2 rank 2666 MHz, configured at 2400 MHz

 (End of data from sysinfo program)

General Notes

Environment variables set by runspec before the start of the run:
LD_LIBRARY_PATH = "/home/cpu2006-1.2/lib/ia32:/home/cpu2006-1.2/lib/intel64:/home/cpu2006-1.2/sh10.2"

 Binaries compiled on a system with 1x Intel Core i7-4790 CPU + 32GB RAM
 memory using Redhat Enterprise Linux 7.2
 Transparent Huge Pages enabled with:
 echo always > /sys/kernel/mm/transparent_hugepage/enabled
 Filesystem page cache cleared with:
 shell invocation of 'sync; echo 3 > /proc/sys/vm/drop_caches' prior to run
 runspec command invoked through numactl i.e.:
 numactl --interleave=all runspec <etc>
 No: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown)
 is mitigated in the system as tested and documented.
 No: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1)
 is mitigated in the system as tested and documented.
 No: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2)
 is mitigated in the system as tested and documented.

This benchmark result is intended to provide perspective on
past performance using the historical hardware and/or
software described on this result page.

The system as described on this result page was formerly
generally available.  At the time of this publication, it may
not be shipping, and/or may not be supported, and/or may fail
to meet other tests of General Availability described in the
SPEC OSG Policy document, http://www.spec.org/osg/policy.html

This measured result may not be representative of the result
that would be measured were this benchmark run with hardware
and software available as of the publication date.

Base Compiler Invocation

C benchmarks:

 icc -m64 

C++ benchmarks:

 icpc -m64 

Fortran benchmarks:

 ifort -m64 

Benchmarks using both Fortran and C:

 icc -m64   ifort -m64 

Base Portability Flags

410.bwaves:  -DSPEC_CPU_LP64 
416.gamess:  -DSPEC_CPU_LP64 
433.milc:  -DSPEC_CPU_LP64 
434.zeusmp:  -DSPEC_CPU_LP64 
435.gromacs:  -DSPEC_CPU_LP64   -nofor_main 
436.cactusADM:  -DSPEC_CPU_LP64   -nofor_main 
437.leslie3d:  -DSPEC_CPU_LP64 
444.namd:  -DSPEC_CPU_LP64 
447.dealII:  -DSPEC_CPU_LP64 
450.soplex:  -DSPEC_CPU_LP64 
453.povray:  -DSPEC_CPU_LP64 
454.calculix:  -DSPEC_CPU_LP64   -nofor_main 
459.GemsFDTD:  -DSPEC_CPU_LP64 
465.tonto:  -DSPEC_CPU_LP64 
470.lbm:  -DSPEC_CPU_LP64 
481.wrf:  -DSPEC_CPU_LP64   -DSPEC_CPU_CASE_FLAG   -DSPEC_CPU_LINUX 
482.sphinx3:  -DSPEC_CPU_LP64 

Base Optimization Flags

C benchmarks:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch   -auto-p32   -qopt-mem-layout-trans=3 

C++ benchmarks:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch   -auto-p32   -qopt-mem-layout-trans=3 

Fortran benchmarks:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch 

Benchmarks using both Fortran and C:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch   -auto-p32   -qopt-mem-layout-trans=3 

Peak Compiler Invocation

C benchmarks:

 icc -m64 

C++ benchmarks (except as noted below):

 icpc -m64 
450.soplex:  icpc -m32 -L/opt/intel/compilers_and_libraries_2017/linux/lib/ia32 

Fortran benchmarks:

 ifort -m64 

Benchmarks using both Fortran and C:

 icc -m64   ifort -m64 

Peak Portability Flags

410.bwaves:  -DSPEC_CPU_LP64 
416.gamess:  -DSPEC_CPU_LP64 
433.milc:  -DSPEC_CPU_LP64 
434.zeusmp:  -DSPEC_CPU_LP64 
435.gromacs:  -DSPEC_CPU_LP64   -nofor_main 
436.cactusADM:  -DSPEC_CPU_LP64   -nofor_main 
437.leslie3d:  -DSPEC_CPU_LP64 
444.namd:  -DSPEC_CPU_LP64 
447.dealII:  -DSPEC_CPU_LP64 
450.soplex:  -D_FILE_OFFSET_BITS=64 
453.povray:  -DSPEC_CPU_LP64 
454.calculix:  -DSPEC_CPU_LP64   -nofor_main 
459.GemsFDTD:  -DSPEC_CPU_LP64 
465.tonto:  -DSPEC_CPU_LP64 
470.lbm:  -DSPEC_CPU_LP64 
481.wrf:  -DSPEC_CPU_LP64   -DSPEC_CPU_CASE_FLAG   -DSPEC_CPU_LINUX 
482.sphinx3:  -DSPEC_CPU_LP64 

Peak Optimization Flags

C benchmarks:

433.milc:  basepeak = yes 
470.lbm:  basepeak = yes 
482.sphinx3:  basepeak = yes 

C++ benchmarks:

444.namd:  -prof-gen(pass 1)   -prof-use(pass 2)   -xCORE-AVX2(pass 2)   -par-num-threads=1(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -fno-alias   -auto-ilp32   -qopt-mem-layout-trans=3 
447.dealII:  basepeak = yes 
450.soplex:  -prof-gen(pass 1)   -prof-use(pass 2)   -xCORE-AVX2(pass 2)   -par-num-threads=1(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -qopt-malloc-options=3   -qopt-mem-layout-trans=3 
453.povray:  -prof-gen(pass 1)   -prof-use(pass 2)   -xCORE-AVX2(pass 2)   -par-num-threads=1(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -unroll4   -qopt-mem-layout-trans=3 

Fortran benchmarks:

410.bwaves:  -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch 
416.gamess:  -prof-gen(pass 1)   -prof-use(pass 2)   -xCORE-AVX2(pass 2)   -par-num-threads=1(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -unroll2   -inline-level=0   -scalar-rep- 
434.zeusmp:  basepeak = yes 
437.leslie3d:  Same as 410.bwaves 
459.GemsFDTD:  Same as 410.bwaves 
465.tonto:  -prof-gen(pass 1)   -prof-use(pass 2)   -xCORE-AVX2(pass 2)   -par-num-threads=1(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -unroll4   -auto   -inline-calloc   -qopt-malloc-options=3 

Benchmarks using both Fortran and C:

435.gromacs:  -prof-gen(pass 1)   -prof-use(pass 2)   -xCORE-AVX2(pass 2)   -par-num-threads=1(pass 1)   -qopt-prefetch   -auto-ilp32   -qopt-mem-layout-trans=3 
436.cactusADM:  basepeak = yes 
454.calculix:  basepeak = yes 
481.wrf:  basepeak = yes 

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2006/flags/Intel-ic17.0-official-linux64-revF.html,
http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revH.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2006/flags/Intel-ic17.0-official-linux64-revF.xml,
http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revH.xml.