SPEC(R) CINT2006 Summary Hewlett Packard Enterprise Synergy 480 Gen10 (2.00 GHz, Intel Xeon Platinum 8153) Test Sponsor: HPE Sat Dec 2 19:31:28 2017 CPU2006 License: 3 Test date: Dec-2017 Test sponsor: HPE Hardware availability: Oct-2017 Tested by: HPE Software availability: Sep-2017 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 64 639 978 S 400.perlbench 64 638 981 * 400.perlbench 64 635 985 S 401.bzip2 64 1024 603 * 401.bzip2 64 1020 605 S 401.bzip2 64 1033 598 S 403.gcc 64 505 1020 S 403.gcc 64 504 1020 S 403.gcc 64 504 1020 * 429.mcf 64 301 1940 S 429.mcf 64 300 1940 S 429.mcf 64 301 1940 * 445.gobmk 64 814 825 S 445.gobmk 64 811 828 S 445.gobmk 64 811 827 * 456.hmmer 64 306 1950 S 456.hmmer 64 305 1960 * 456.hmmer 64 304 1960 S 458.sjeng 64 870 890 * 458.sjeng 64 871 889 S 458.sjeng 64 869 891 S 462.libquantum 64 53.0 25000 S 462.libquantum 64 52.8 25100 * 462.libquantum 64 52.8 25100 S 464.h264ref 64 980 1440 S 464.h264ref 64 979 1450 * 464.h264ref 64 978 1450 S 471.omnetpp 64 523 765 S 471.omnetpp 64 521 768 * 471.omnetpp 64 520 769 S 473.astar 64 585 768 * 473.astar 64 584 769 S 473.astar 64 585 768 S 483.xalancbmk 64 258 1710 * 483.xalancbmk 64 255 1730 S 483.xalancbmk 64 258 1710 S ============================================================================== 400.perlbench 64 638 981 * 401.bzip2 64 1024 603 * 403.gcc 64 504 1020 * 429.mcf 64 301 1940 * 445.gobmk 64 811 827 * 456.hmmer 64 305 1960 * 458.sjeng 64 870 890 * 462.libquantum 64 52.8 25100 * 464.h264ref 64 979 1450 * 471.omnetpp 64 521 768 * 473.astar 64 585 768 * 483.xalancbmk 64 258 1710 * SPECint(R)_rate_base2006 1410 SPECint_rate2006 Not Run HARDWARE -------- CPU Name: Intel Xeon Platinum 8153 CPU Characteristics: Intel Turbo Boost Technology up to 2.80 GHz CPU MHz: 2000 FPU: Integrated CPU(s) enabled: 32 cores, 2 chips, 16 cores/chip, 2 threads/core CPU(s) orderable: 1, 2 chip(s) Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 1 MB I+D on chip per core L3 Cache: 22 MB I+D on chip per chip Other Cache: None Memory: 384 GB (24 x 16 GB 2Rx8 PC4-2666V-R) Disk Subsystem: 1 x 480 GB SATA SSD, RAID 0 Other Hardware: None SOFTWARE -------- Operating System: SUSE Linux Enterprise Server 12 (x86_64) SP2 Kernel 4.4.21-69-default Compiler: C/C++: Version 18.0.0.128 of Intel C/C++ Compiler for Linux Auto Parallel: No File System: xfs System State: Run level 3 (multi-user) Base Pointers: 32-bit Peak Pointers: Not Applicable Other Software: Microquill SmartHeap V10.2 Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Transparent Huge Pages enabled by default Filesystem page cache cleared with: shell invocation of 'sync; echo 3 > /proc/sys/vm/drop_caches' prior to run runspec command invoked through numactl i.e.: numactl --interleave=all runspec irqbalance disabled with "service irqbalance stop" tuned profile set wtih "tuned-adm profile throughput-performance" VM Dirty ratio was set to 40 using "echo 40 > /proc/sys/vm/dirty_ratio" Numa balancing was disabled using "echo 0 > /proc/sys/kernel/numa_balancing" Platform Notes -------------- BIOS Configuration: Thermal Configuration set to Maximum Cooling LLC Prefetch set to Enabled LLC Dead Line Allocation set to Disabled Memory Patrol Scrubbing set to Disabled Workload Profile set to General Throughput Compute Minimum Processor Idle Power Core C-State set to C1E State Sysinfo program /home/cpu2006/config/sysinfo.rev6993 Revision 6993 of 2015-11-06 (b5e8d4b4eb51ed28d7f98696cbe290c1) running on sy480_hjp_suse Sun Dec 3 06:01:29 2017 This section contains SUT (System Under Test) info as seen by some common utilities. To remove or add to this section, see: http://www.spec.org/cpu2006/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Platinum 8153 CPU @ 2.00GHz 2 "physical id"s (chips) 64 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 16 siblings : 32 physical 0: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 physical 1: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 cache size : 22528 KB From /proc/meminfo MemTotal: 395924524 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 2 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP2" VERSION_ID="12.2" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp2" uname -a: Linux sy480_hjp_suse 4.4.21-69-default #1 SMP Tue Oct 25 10:58:20 UTC 2016 (9464f67) x86_64 x86_64 x86_64 GNU/Linux run-level 3 Dec 3 06:00 SPEC is set to: /home/cpu2006 Filesystem Type Size Used Avail Use% Mounted on /dev/sda3 xfs 407G 117G 291G 29% /home Additional information from dmidecode: Warning: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS HPE I42 09/27/2017 Memory: 24x UNKNOWN NOT AVAILABLE 16 GB 2 rank 2666 MHz (End of data from sysinfo program) General Notes ------------- Environment variables set by runspec before the start of the run: LD_LIBRARY_PATH = "/home/cpu2006/libs/32:/home/cpu2006/libs/64:/home/cpu2006/sh10.2" Binaries compiled on a system with 1x Intel Core i7-4790 CPU + 32GB RAM memory using Redhat Enterprise Linux 7.2 Base Compiler Invocation ------------------------ C benchmarks: icc -m32 -L/opt/intel/compilers_and_libraries_2018.0.082/linux/lib/ia32 C++ benchmarks: icpc -m32 -L/opt/intel/compilers_and_libraries_2018.0.082/linux/lib/ia32 Base Portability Flags ---------------------- 400.perlbench: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX_IA32 401.bzip2: -D_FILE_OFFSET_BITS=64 403.gcc: -D_FILE_OFFSET_BITS=64 429.mcf: -D_FILE_OFFSET_BITS=64 445.gobmk: -D_FILE_OFFSET_BITS=64 456.hmmer: -D_FILE_OFFSET_BITS=64 458.sjeng: -D_FILE_OFFSET_BITS=64 462.libquantum: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX 464.h264ref: -D_FILE_OFFSET_BITS=64 471.omnetpp: -D_FILE_OFFSET_BITS=64 473.astar: -D_FILE_OFFSET_BITS=64 483.xalancbmk: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX Base Optimization Flags ----------------------- C benchmarks: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -qopt-mem-layout-trans=3 C++ benchmarks: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -qopt-mem-layout-trans=3 -Wl,-z,muldefs -L/home/cpu2006/sh10.2 -lsmartheap Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic17.0-official-linux64-revF.html http://www.spec.org/cpu2006/flags/HPE-Platform-Flags-Intel-V1.2-SKX-revH.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2006/flags/Intel-ic17.0-official-linux64-revF.xml http://www.spec.org/cpu2006/flags/HPE-Platform-Flags-Intel-V1.2-SKX-revH.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2018 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.2. Report generated on Tue Jan 16 12:10:01 2018 by CPU2006 ASCII formatter v6932. Originally published on 14 January 2018.