SPEC(R) CINT2006 Summary Hewlett Packard Enterprise Synergy 480 Gen10 (2.20 GHz, Intel Xeon Silver 4114) Test Sponsor: HPE Tue Nov 21 01:52:54 2017 CPU2006 License: 3 Test date: Nov-2017 Test sponsor: HPE Hardware availability: Oct-2017 Tested by: HPE Software availability: Sep-2017 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 40 590 662 * 400.perlbench 40 591 662 S 400.perlbench 40 590 663 S 401.bzip2 40 986 391 S 401.bzip2 40 978 395 S 401.bzip2 40 981 393 * 403.gcc 40 492 654 * 403.gcc 40 492 655 S 403.gcc 40 493 654 S 429.mcf 40 292 1250 * 429.mcf 40 292 1250 S 429.mcf 40 293 1240 S 445.gobmk 40 751 558 S 445.gobmk 40 751 559 * 445.gobmk 40 751 559 S 456.hmmer 40 281 1330 S 456.hmmer 40 280 1330 * 456.hmmer 40 278 1340 S 458.sjeng 40 806 600 * 458.sjeng 40 806 601 S 458.sjeng 40 806 600 S 462.libquantum 40 57.2 14500 * 462.libquantum 40 57.2 14500 S 462.libquantum 40 57.0 14500 S 464.h264ref 40 906 977 * 464.h264ref 40 902 981 S 464.h264ref 40 906 977 S 471.omnetpp 40 525 476 S 471.omnetpp 40 526 475 * 471.omnetpp 40 526 475 S 473.astar 40 538 522 * 473.astar 40 538 522 S 473.astar 40 536 524 S 483.xalancbmk 40 247 1120 * 483.xalancbmk 40 246 1120 S 483.xalancbmk 40 247 1120 S ============================================================================== 400.perlbench 40 590 662 * 401.bzip2 40 981 393 * 403.gcc 40 492 654 * 429.mcf 40 292 1250 * 445.gobmk 40 751 559 * 456.hmmer 40 280 1330 * 458.sjeng 40 806 600 * 462.libquantum 40 57.2 14500 * 464.h264ref 40 906 977 * 471.omnetpp 40 526 475 * 473.astar 40 538 522 * 483.xalancbmk 40 247 1120 * SPECint(R)_rate_base2006 921 SPECint_rate2006 Not Run HARDWARE -------- CPU Name: Intel Xeon Silver 4114 CPU Characteristics: Intel Turbo Boost Technology up to 3.00 GHz CPU MHz: 2200 FPU: Integrated CPU(s) enabled: 20 cores, 2 chips, 10 cores/chip, 2 threads/core CPU(s) orderable: 1, 2 chip(s) Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 1 MB I+D on chip per core L3 Cache: 13.75 MB I+D on chip per chip Other Cache: None Memory: 384 GB (24 x 16 GB 2Rx8 PC4-2666V-R, running at 2400) Disk Subsystem: 1 x 480 GB SATA SSD, RAID 0 Other Hardware: None SOFTWARE -------- Operating System: SUSE Linux Enterprise Server 12 (x86_64) SP2 Kernel 4.4.21-69-default Compiler: C/C++: Version 18.0.0.128 of Intel C/C++ Compiler for Linux Auto Parallel: No File System: xfs System State: Run level 3 (multi-user) Base Pointers: 32-bit Peak Pointers: Not Applicable Other Software: Microquill SmartHeap V10.2 Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Transparent Huge Pages enabled by default Filesystem page cache cleared with: shell invocation of 'sync; echo 3 > /proc/sys/vm/drop_caches' prior to run runspec command invoked through numactl i.e.: numactl --interleave=all runspec irqbalance disabled with "service irqbalance stop" tuned profile set wtih "tuned-adm profile throughput-performance" VM Dirty ratio was set to 40 using "echo 40 > /proc/sys/vm/dirty_ratio" Numa balancing was disabled using "echo 0 > /proc/sys/kernel/numa_balancing" Platform Notes -------------- BIOS Configuration: Thermal Configuration set to Maximum Cooling LLC Prefetch set to Enabled LLC Dead Line Allocation set to Disabled Memory Patrol Scrubbing set to Disabled Workload Profile set to General Throughput Compute Minimum Processor Idle Power Core C-State set to C1E State Workload Profile set to Custom Sub-NUMA Clustering set to Disabled Sysinfo program /home/cpu2006/config/sysinfo.rev6993 Revision 6993 of 2015-11-06 (b5e8d4b4eb51ed28d7f98696cbe290c1) running on sy480_hjp_suse_machine1 Tue Nov 21 12:22:55 2017 This section contains SUT (System Under Test) info as seen by some common utilities. To remove or add to this section, see: http://www.spec.org/cpu2006/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Silver 4114 CPU @ 2.20GHz 2 "physical id"s (chips) 40 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 10 siblings : 20 physical 0: cores 0 1 2 3 4 8 9 10 11 12 physical 1: cores 0 1 2 3 4 8 9 10 11 12 cache size : 14080 KB From /proc/meminfo MemTotal: 395928228 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 2 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP2" VERSION_ID="12.2" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp2" uname -a: Linux sy480_hjp_suse_machine1 4.4.21-69-default #1 SMP Tue Oct 25 10:58:20 UTC 2016 (9464f67) x86_64 x86_64 x86_64 GNU/Linux run-level 3 Nov 21 12:21 SPEC is set to: /home/cpu2006 Filesystem Type Size Used Avail Use% Mounted on /dev/sda4 xfs 405G 48G 358G 12% /home Additional information from dmidecode: Warning: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS HPE I42 09/27/2017 Memory: 24x UNKNOWN NOT AVAILABLE 16 GB 2 rank 2666 MHz, configured at 2400 MHz (End of data from sysinfo program) General Notes ------------- Environment variables set by runspec before the start of the run: LD_LIBRARY_PATH = "/home/cpu2006/libs/32:/home/cpu2006/libs/64:/home/cpu2006/sh10.2" Binaries compiled on a system with 1x Intel Core i7-4790 CPU + 32GB RAM memory using Redhat Enterprise Linux 7.2 Base Compiler Invocation ------------------------ C benchmarks: icc -m32 -L/opt/intel/compilers_and_libraries_2018.0.082/linux/lib/ia32 C++ benchmarks: icpc -m32 -L/opt/intel/compilers_and_libraries_2018.0.082/linux/lib/ia32 Base Portability Flags ---------------------- 400.perlbench: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX_IA32 401.bzip2: -D_FILE_OFFSET_BITS=64 403.gcc: -D_FILE_OFFSET_BITS=64 429.mcf: -D_FILE_OFFSET_BITS=64 445.gobmk: -D_FILE_OFFSET_BITS=64 456.hmmer: -D_FILE_OFFSET_BITS=64 458.sjeng: -D_FILE_OFFSET_BITS=64 462.libquantum: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX 464.h264ref: -D_FILE_OFFSET_BITS=64 471.omnetpp: -D_FILE_OFFSET_BITS=64 473.astar: -D_FILE_OFFSET_BITS=64 483.xalancbmk: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX Base Optimization Flags ----------------------- C benchmarks: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -qopt-mem-layout-trans=3 C++ benchmarks: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -qopt-mem-layout-trans=3 -Wl,-z,muldefs -L/home/cpu2006/sh10.2 -lsmartheap Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic17.0-official-linux64-revF.html http://www.spec.org/cpu2006/flags/HPE-Platform-Flags-Intel-V1.2-SKX-revH.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2006/flags/Intel-ic17.0-official-linux64-revF.xml http://www.spec.org/cpu2006/flags/HPE-Platform-Flags-Intel-V1.2-SKX-revH.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2018 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.2. Report generated on Tue Jan 16 12:10:02 2018 by CPU2006 ASCII formatter v6932. Originally published on 14 January 2018.