SPEC® CFP2006 Result

Cisco Systems

Cisco UCS C240 M5 (Intel Xeon Gold 6126,
2.60GHz)

SPECfp®_rate2006 = 1180

SPECfp_rate_base2006 = 1160

CPU2006 license:	9019	Test date:	Aug-2017
Test sponsor:	Cisco Systems	Hardware Availability:	Aug-2017
Tested by:	Cisco Systems	Software Availability:	Apr-2017

Hardware
CPU Name:	Intel Xeon Gold 6126
CPU Characteristics:	Intel Turbo Boost Technology up to 3.70 GHz
CPU MHz:	2600
FPU:	Integrated
CPU(s) enabled:	24 cores, 2 chips, 12 cores/chip, 2 threads/core
CPU(s) orderable:	1,2 chips
Primary Cache:	32 KB I + 32 KB D on chip per core
Secondary Cache:	1 MB I+D on chip per core
L3 Cache:	19.25 MB I+D on chip per chip
Other Cache:	None
Memory:	384 GB (24 x 16 GB 2Rx4 PC4-2666V-R)
Disk Subsystem:	1 x 480 GB SSD SAS
Other Hardware:	None

Software
Operating System:	SUSE Linux Enterprise Server 12 SP2 (x86_64) 4.4.21-69-default
Compiler:	C/C++: Version 17.0.3.191 of Intel C/C++ Compiler for Linux; Fortran: Version 17.0.3.191 of Intel Fortran Compiler for Linux
Auto Parallel:	Yes
File System:	xfs
System State:	Run level 3 (multi-user)
Base Pointers:	32/64-bit
Peak Pointers:	32/64-bit
Other Software:	None

Results Table

Benchmark	Base							Peak
Benchmark	Copies	Seconds	Ratio	Seconds	Ratio	Seconds	Ratio	Copies	Seconds	Ratio	Seconds	Ratio	Seconds	Ratio
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
410.bwaves	48	624	1050	624	1050	624	1050	48	624	1050	624	1050	624	1050
416.gamess	48	815	1150	814	1150	815	1150	48	788	1190	788	1190	788	1190
433.milc	48	431	1020	431	1020	431	1020	48	431	1020	431	1020	431	1020
434.zeusmp	48	312	1400	309	1410	311	1400	48	312	1400	309	1410	311	1400
435.gromacs	48	249	1380	249	1380	251	1370	48	244	1400	246	1390	246	1400
436.cactusADM	48	377	1520	372	1540	372	1540	48	377	1520	372	1540	372	1540
437.leslie3d	48	637	708	635	710	631	715	48	631	715	643	702	632	714
444.namd	48	411	937	409	941	411	936	48	406	949	405	950	406	949
447.dealII	48	303	1810	303	1810	305	1800	48	303	1810	303	1810	305	1800
450.soplex	48	542	739	541	739	541	740	48	516	776	517	775	515	777
453.povray	48	160	1590	159	1610	159	1610	48	137	1870	137	1860	137	1860
454.calculix	48	222	1780	222	1780	223	1770	48	222	1780	222	1780	223	1770
459.GemsFDTD	48	787	647	789	645	788	646	48	788	647	788	646	787	647
465.tonto	48	382	1240	382	1240	381	1240	48	363	1300	363	1300	364	1300
470.lbm	48	517	1280	517	1280	517	1280	48	517	1280	517	1280	517	1280
481.wrf	48	438	1220	441	1220	440	1220	48	438	1220	441	1220	440	1220
482.sphinx3	48	848	1100	846	1110	846	1110	48	848	1100	846	1110	846	1110

Submit Notes

 The numactl mechanism was used to bind copies to processors. The config file option 'submit'
 was used to generate numactl commands to bind each copy to a specific processor.
 For details, please see the config file.

Operating System Notes

 Stack size set to unlimited using "ulimit -s unlimited"

Platform Notes

BIOS Settings:
Intel HyperThreading Technology set to Enabled
CPU performance set to Enterprise
Power Performance Tuning set to OS
SNC set to Enabled
IMC Interleaving set to 1-way Interleave
Patrol Scrub set to Disabled
 Sysinfo program /home/cpu2006-1.2/config/sysinfo.rev6993
 Revision 6993 of 2015-11-06 (b5e8d4b4eb51ed28d7f98696cbe290c1)
 running on linux-j64x Tue Aug 29 11:33:44 2017

 This section contains SUT (System Under Test) info as seen by
 some common utilities.  To remove or add to this section, see:
   http://www.spec.org/cpu2006/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : Intel(R) Xeon(R) Gold 6126 CPU @ 2.60GHz
       2 "physical id"s (chips)
       48 "processors"
    cores, siblings (Caution: counting these is hw and system dependent.  The
    following excerpts from /proc/cpuinfo might not be reliable.  Use with
    caution.)
       cpu cores : 12
       siblings  : 24
       physical 0: cores 0 1 3 4 5 6 8 9 10 11 12 13
       physical 1: cores 0 1 2 3 4 5 6 8 9 11 12 13
    cache size : 19712 KB

 From /proc/meminfo
    MemTotal:       394864272 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 /usr/bin/lsb_release -d
    SUSE Linux Enterprise Server 12 SP2

 From /etc/*release* /etc/*version*
    SuSE-release:
       SUSE Linux Enterprise Server 12 (x86_64)
       VERSION = 12
       PATCHLEVEL = 2
       # This file is deprecated and will be removed in a future service pack or
       release.
       # Please check /etc/os-release for details about this release.
    os-release:
       NAME="SLES"
       VERSION="12-SP2"
       VERSION_ID="12.2"
       PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2"
       ID="sles"
       ANSI_COLOR="0;32"
       CPE_NAME="cpe:/o:suse:sles:12:sp2"

 uname -a:
    Linux linux-j64x 4.4.21-69-default #1 SMP Tue Oct 25 10:58:20 UTC 2016
    (9464f67) x86_64 x86_64 x86_64 GNU/Linux

 run-level 3 Aug 29 02:21

 SPEC is set to: /home/cpu2006-1.2
    Filesystem     Type  Size  Used Avail Use% Mounted on
    /dev/sdb7      xfs   416G   19G  398G   5% /home
 Additional information from dmidecode:

    Warning: Use caution when you interpret this section. The 'dmidecode' program
    reads system data which is "intended to allow hardware to be accurately
    determined", but the intent may not be met, as there are frequent changes to
    hardware, firmware, and the "DMTF SMBIOS" standard.

   BIOS Cisco Systems, Inc. C240M5.3.1.1d.0.0615170707 06/15/2017
   Memory:
    24x 0xCE00 M393A2G40EB2-CTD 16 GB 2 rank 2666 MHz

 (End of data from sysinfo program)

General Notes

Environment variables set by runspec before the start of the run:
LD_LIBRARY_PATH = "/home/cpu2006-1.2/lib/ia32:/home/cpu2006-1.2/lib/intel64:/home/cpu2006-1.2/sh10.2"

 Binaries compiled on a system with 1x Intel Core i7-4790 CPU + 32GB RAM
 memory using Redhat Enterprise Linux 7.2
 Transparent Huge Pages enabled with:
 echo always > /sys/kernel/mm/transparent_hugepage/enabled
 Filesystem page cache cleared with:
 shell invocation of 'sync; echo 3 > /proc/sys/vm/drop_caches' prior to run
 runspec command invoked through numactl i.e.:
 numactl --interleave=all runspec <etc>

Base Compiler Invocation

C benchmarks:

icc -m64

C++ benchmarks:

icpc -m64

Fortran benchmarks:

ifort -m64

Benchmarks using both Fortran and C:

icc -m64 ifort -m64

Base Portability Flags

410.bwaves:	-DSPEC_CPU_LP64
416.gamess:	-DSPEC_CPU_LP64
433.milc:	-DSPEC_CPU_LP64
434.zeusmp:	-DSPEC_CPU_LP64
435.gromacs:	-DSPEC_CPU_LP64 -nofor_main
436.cactusADM:	-DSPEC_CPU_LP64 -nofor_main
437.leslie3d:	-DSPEC_CPU_LP64
444.namd:	-DSPEC_CPU_LP64
447.dealII:	-DSPEC_CPU_LP64
450.soplex:	-DSPEC_CPU_LP64
453.povray:	-DSPEC_CPU_LP64
454.calculix:	-DSPEC_CPU_LP64 -nofor_main
459.GemsFDTD:	-DSPEC_CPU_LP64
465.tonto:	-DSPEC_CPU_LP64
470.lbm:	-DSPEC_CPU_LP64
481.wrf:	-DSPEC_CPU_LP64 -DSPEC_CPU_CASE_FLAG -DSPEC_CPU_LINUX
482.sphinx3:	-DSPEC_CPU_LP64

Peak Compiler Invocation

C benchmarks:

icc -m64

C++ benchmarks (except as noted below):

	icpc -m64
450.soplex:	icpc -m32 -L/opt/intel/compilers_and_libraries_2017/linux/lib/ia32

Fortran benchmarks:

ifort -m64

Benchmarks using both Fortran and C:

icc -m64 ifort -m64

Peak Portability Flags

410.bwaves:	-DSPEC_CPU_LP64
416.gamess:	-DSPEC_CPU_LP64
433.milc:	-DSPEC_CPU_LP64
434.zeusmp:	-DSPEC_CPU_LP64
435.gromacs:	-DSPEC_CPU_LP64 -nofor_main
436.cactusADM:	-DSPEC_CPU_LP64 -nofor_main
437.leslie3d:	-DSPEC_CPU_LP64
444.namd:	-DSPEC_CPU_LP64
447.dealII:	-DSPEC_CPU_LP64
450.soplex:	-D_FILE_OFFSET_BITS=64
453.povray:	-DSPEC_CPU_LP64
454.calculix:	-DSPEC_CPU_LP64 -nofor_main
459.GemsFDTD:	-DSPEC_CPU_LP64
465.tonto:	-DSPEC_CPU_LP64
470.lbm:	-DSPEC_CPU_LP64
481.wrf:	-DSPEC_CPU_LP64 -DSPEC_CPU_CASE_FLAG -DSPEC_CPU_LINUX
482.sphinx3:	-DSPEC_CPU_LP64

Peak Optimization Flags

C benchmarks:

433.milc:	basepeak = yes
470.lbm:	basepeak = yes
482.sphinx3:	basepeak = yes

C++ benchmarks:

444.namd:	-prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX2(pass 2) -par-num-threads=1(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -fno-alias -auto-ilp32 -qopt-mem-layout-trans=3
447.dealII:	basepeak = yes
450.soplex:	-prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX2(pass 2) -par-num-threads=1(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -qopt-malloc-options=3 -qopt-mem-layout-trans=3
453.povray:	-prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX2(pass 2) -par-num-threads=1(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -unroll4 -qopt-mem-layout-trans=3

Fortran benchmarks:

410.bwaves:	-xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-prefetch
416.gamess:	-prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX2(pass 2) -par-num-threads=1(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -unroll2 -inline-level=0 -scalar-rep-
434.zeusmp:	basepeak = yes
437.leslie3d:	Same as 410.bwaves
459.GemsFDTD:	Same as 410.bwaves
465.tonto:	-prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX2(pass 2) -par-num-threads=1(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -unroll4 -auto -inline-calloc -qopt-malloc-options=3

Benchmarks using both Fortran and C:

435.gromacs:	-prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX2(pass 2) -par-num-threads=1(pass 1) -qopt-prefetch -auto-ilp32 -qopt-mem-layout-trans=3
436.cactusADM:	basepeak = yes
454.calculix:	basepeak = yes
481.wrf:	basepeak = yes

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2006/flags/Intel-ic17.0-official-linux64-revF.html,
http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revH.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2006/flags/Intel-ic17.0-official-linux64-revF.xml,
http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revH.xml.