SPEC(R) CINT2006 Summary Cisco Systems Cisco UCS B420 M4 (Intel Xeon E5-4640 v4, 2.10 GHz) Mon Nov 14 11:39:40 2016 CPU2006 License: 9019 Test date: Nov-2016 Test sponsor: Cisco Systems Hardware availability: Jun-2016 Tested by: Cisco Systems Software availability: Dec-2015 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 96 722 1300 S 400.perlbench 96 722 1300 * 400.perlbench 96 720 1300 S 401.bzip2 96 1057 876 * 401.bzip2 96 1058 876 S 401.bzip2 96 1055 878 S 403.gcc 96 562 1380 S 403.gcc 96 559 1380 S 403.gcc 96 559 1380 * 429.mcf 96 344 2550 S 429.mcf 96 343 2550 S 429.mcf 96 344 2550 * 445.gobmk 96 853 1180 * 445.gobmk 96 853 1180 S 445.gobmk 96 852 1180 S 456.hmmer 96 340 2640 * 456.hmmer 96 340 2640 S 456.hmmer 96 340 2630 S 458.sjeng 96 957 1210 S 458.sjeng 96 958 1210 S 458.sjeng 96 958 1210 * 462.libquantum 96 119 16700 S 462.libquantum 96 119 16700 * 462.libquantum 96 119 16800 S 464.h264ref 96 967 2200 S 464.h264ref 96 966 2200 * 464.h264ref 96 964 2200 S 471.omnetpp 96 588 1020 * 471.omnetpp 96 588 1020 S 471.omnetpp 96 587 1020 S 473.astar 96 629 1070 * 473.astar 96 629 1070 S 473.astar 96 630 1070 S 483.xalancbmk 96 299 2220 S 483.xalancbmk 96 298 2220 S 483.xalancbmk 96 298 2220 * ============================================================================== 400.perlbench 96 722 1300 * 401.bzip2 96 1057 876 * 403.gcc 96 559 1380 * 429.mcf 96 344 2550 * 445.gobmk 96 853 1180 * 456.hmmer 96 340 2640 * 458.sjeng 96 958 1210 * 462.libquantum 96 119 16700 * 464.h264ref 96 966 2200 * 471.omnetpp 96 588 1020 * 473.astar 96 629 1070 * 483.xalancbmk 96 298 2220 * SPECint(R)_rate_base2006 1820 SPECint_rate2006 Not Run HARDWARE -------- CPU Name: Intel Xeon E5-4640 v4 CPU Characteristics: Intel Turbo Boost Technology up to 2.60 GHz CPU MHz: 2100 FPU: Integrated CPU(s) enabled: 48 cores, 4 chips, 12 cores/chip, 2 threads/core CPU(s) orderable: 2,4 chips Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 256 KB I+D on chip per core L3 Cache: 30 MB I+D on chip per chip Other Cache: None Memory: 1 TB (32 x 32 GB 2Rx4 PC4-2400T-R, running at 2133 MHz) Disk Subsystem: 1 x 300 GB SAS, 15K RPM Other Hardware: None SOFTWARE -------- Operating System: SUSE Linux Enterprise Server 12 SP1 (x86_64) 3.12.49-11-default Compiler: C/C++: Version 16.0.0.101 of Intel C++ Studio XE for Linux Auto Parallel: No File System: xfs System State: Run level 3 (multi-user) Base Pointers: 32-bit Peak Pointers: 32/64-bit Other Software: Microquill SmartHeap V10.2 Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Platform Notes -------------- BIOS Settings: CPU performance set to Enterprise Power Technology set to Energy Efficient Energy Performance set to Balanced Performance Memory RAS configuration set to Maximum Performance Memory Power Saving Mode set to Disabled QPI Snoop Mode set to Cluster-on-Die Sysinfo program /opt/cpu2006-1.2/config/sysinfo.rev6914 $Rev: 6914 $ $Date:: 2014-06-25 #$ e3fbb8667b5a285932ceab81e28219e1 running on linux-1fno Mon Nov 14 08:39:41 2016 This section contains SUT (System Under Test) info as seen by some common utilities. To remove or add to this section, see: http://www.spec.org/cpu2006/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) CPU E5-4640 v4 @ 2.10GHz 4 "physical id"s (chips) 96 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 12 siblings : 24 physical 0: cores 0 1 2 3 4 5 8 9 10 11 12 13 physical 1: cores 0 1 2 3 4 5 8 9 10 11 12 13 physical 2: cores 0 1 2 3 4 5 8 9 10 11 12 13 physical 3: cores 0 1 2 3 4 5 8 9 10 11 12 13 cache size : 15360 KB From /proc/meminfo MemTotal: 1058693248 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 1 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP1" VERSION_ID="12.1" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP1" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp1" uname -a: Linux linux-1fno 3.12.49-11-default #1 SMP Wed Nov 11 20:52:43 UTC 2015 (8d714a0) x86_64 x86_64 x86_64 GNU/Linux run-level 3 Nov 14 08:38 SPEC is set to: /opt/cpu2006-1.2 Filesystem Type Size Used Avail Use% Mounted on /dev/sda1 xfs 280G 75G 205G 27% / Additional information from dmidecode: Warning: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS Cisco Systems, Inc. B420M4.3.1.2.0.052320161053 05/23/2016 Memory: 32x 0xCE00 M393A4K40BB1-CRC 32 GB 2 rank 2400 MHz, configured at 2133 MHz 16x NO DIMM NO DIMM (End of data from sysinfo program) General Notes ------------- Environment variables set by runspec before the start of the run: LD_LIBRARY_PATH = "/opt/cpu2006-1.2/libs/32:/opt/cpu2006-1.2/libs/64:/opt/cpu2006-1.2/sh" Binaries compiled on a system with 1x Intel Core i5-4670K CPU + 32GB memory using RedHat EL 7.1 Transparent Huge Pages enabled with: echo always > /sys/kernel/mm/transparent_hugepage/enabled Filesystem page cache cleared with: echo 1> /proc/sys/vm/drop_caches runspec command invoked through numactl i.e.: numactl --interleave=all runspec Base Compiler Invocation ------------------------ C benchmarks: icc -m32 -L/opt/intel/compilers_and_libraries_2016/linux/compiler/lib/ia32_lin C++ benchmarks: icpc -m32 -L/opt/intel/compilers_and_libraries_2016/linux/compiler/lib/ia32_lin Base Portability Flags ---------------------- 400.perlbench: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX_IA32 401.bzip2: -D_FILE_OFFSET_BITS=64 403.gcc: -D_FILE_OFFSET_BITS=64 429.mcf: -D_FILE_OFFSET_BITS=64 445.gobmk: -D_FILE_OFFSET_BITS=64 456.hmmer: -D_FILE_OFFSET_BITS=64 458.sjeng: -D_FILE_OFFSET_BITS=64 462.libquantum: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX 464.h264ref: -D_FILE_OFFSET_BITS=64 471.omnetpp: -D_FILE_OFFSET_BITS=64 473.astar: -D_FILE_OFFSET_BITS=64 483.xalancbmk: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX Base Optimization Flags ----------------------- C benchmarks: -xCORE-AVX2 -ipo -O3 -no-prec-div -opt-prefetch -opt-mem-layout-trans=3 C++ benchmarks: -xCORE-AVX2 -ipo -O3 -no-prec-div -opt-prefetch -opt-mem-layout-trans=3 -Wl,-z,muldefs -L/sh -lsmartheap Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic16.0-official-linux64.html http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revE.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2006/flags/Intel-ic16.0-official-linux64.xml http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revE.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2016 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.2. Report generated on Tue Nov 29 19:08:29 2016 by CPU2006 ASCII formatter v6932. Originally published on 29 November 2016.