SPEC(R) CINT2006 Summary Cisco Systems Cisco UCS C3160 M3 (Intel Xeon E5-2660 v2, 2.20 GHz) Wed May 6 11:34:30 2015 CPU2006 License: 9019 Test date: May-2015 Test sponsor: Cisco Systems Hardware availability: Sep-2014 Tested by: Cisco Systems Software availability: Nov-2014 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 40 730 535 S 40 610 641 S 400.perlbench 40 732 534 S 40 606 645 * 400.perlbench 40 731 534 * 40 604 647 S 401.bzip2 40 992 389 S 40 976 396 S 401.bzip2 40 994 388 S 40 975 396 * 401.bzip2 40 993 389 * 40 975 396 S 403.gcc 40 542 594 S 40 540 596 S 403.gcc 40 541 595 * 40 539 597 * 403.gcc 40 541 596 S 40 539 598 S 429.mcf 40 333 1100 S 40 333 1100 S 429.mcf 40 333 1100 * 40 333 1100 * 429.mcf 40 332 1100 S 40 332 1100 S 445.gobmk 40 796 527 * 40 788 532 S 445.gobmk 40 796 527 S 40 789 532 * 445.gobmk 40 795 528 S 40 792 530 S 456.hmmer 40 377 989 * 40 323 1160 * 456.hmmer 40 378 988 S 40 323 1160 S 456.hmmer 40 377 990 S 40 323 1160 S 458.sjeng 40 927 522 S 40 904 535 S 458.sjeng 40 926 522 S 40 907 534 S 458.sjeng 40 927 522 * 40 905 535 * 462.libquantum 40 179 4640 * 40 179 4640 * 462.libquantum 40 179 4630 S 40 179 4630 S 462.libquantum 40 179 4640 S 40 179 4640 S 464.h264ref 40 995 890 * 40 986 898 * 464.h264ref 40 986 898 S 40 985 899 S 464.h264ref 40 999 886 S 40 986 897 S 471.omnetpp 40 630 397 * 40 605 413 * 471.omnetpp 40 628 398 S 40 603 415 S 471.omnetpp 40 638 392 S 40 608 411 S 473.astar 40 667 421 S 40 667 421 S 473.astar 40 664 423 S 40 664 423 S 473.astar 40 664 423 * 40 664 423 * 483.xalancbmk 40 360 767 S 40 360 767 S 483.xalancbmk 40 359 768 S 40 359 768 S 483.xalancbmk 40 359 768 * 40 359 768 * ============================================================================== 400.perlbench 40 731 534 * 40 606 645 * 401.bzip2 40 993 389 * 40 975 396 * 403.gcc 40 541 595 * 40 539 597 * 429.mcf 40 333 1100 * 40 333 1100 * 445.gobmk 40 796 527 * 40 789 532 * 456.hmmer 40 377 989 * 40 323 1160 * 458.sjeng 40 927 522 * 40 905 535 * 462.libquantum 40 179 4640 * 40 179 4640 * 464.h264ref 40 995 890 * 40 986 898 * 471.omnetpp 40 630 397 * 40 605 413 * 473.astar 40 664 423 * 40 664 423 * 483.xalancbmk 40 359 768 * 40 359 768 * SPECint(R)_rate_base2006 721 SPECint_rate2006 748 HARDWARE -------- CPU Name: Intel Xeon E5-2660 v2 CPU Characteristics: Intel Turbo Boost Technology up to 3.00 GHz CPU MHz: 2200 FPU: Integrated CPU(s) enabled: 20 cores, 2 chips, 10 cores/chip, 2 threads/core CPU(s) orderable: 1,2 chip Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 256 KB I+D on chip per core L3 Cache: 25 MB I+D on chip per chip Other Cache: None Memory: 256 GB (16 x 16 GB 2Rx4 PC3-14900R-13, ECC, running at 1866 MHz and CL7) Disk Subsystem: 1 X 400 GB SSD SAS Other Hardware: None SOFTWARE -------- Operating System: SUSE Linux Enterprise Server 12 (x86_64) 3.12.28-4-default Compiler: C/C++: Version 14.0.0.080 of Intel C++ Studio XE for Linux Auto Parallel: No File System: ext4 System State: Run level 3 (multi-user) Base Pointers: 32-bit Peak Pointers: 32/64-bit Other Software: Microquill SmartHeap V10.0 Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Platform Notes -------------- BIOS Settings: Intel HT Technology = Enabled CPU performance set to Enterprise Power Technology set to Custom CPU Power State C6 set to Disabled CPU Power State C1 Enhanced set to Disabled Energy Performance policy set to Performance Memory RAS configuration set to Maximum Performance DRAM Clock Throttling Set to Performance LV DDR Mode set to Performance-mode Sysinfo program /opt/cpu2006-1.2/config/sysinfo.rev6914 $Rev: 6914 $ $Date:: 2014-06-25 #$ e3fbb8667b5a285932ceab81e28219e1 running on linux-vedd Wed May 6 11:34:31 2015 This section contains SUT (System Under Test) info as seen by some common utilities. To remove or add to this section, see: http://www.spec.org/cpu2006/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) CPU E5-2660 v2 @ 2.20GHz 2 "physical id"s (chips) 40 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 10 siblings : 20 physical 0: cores 0 1 2 3 4 8 9 10 11 12 physical 1: cores 0 1 2 3 4 8 9 10 11 12 cache size : 25600 KB From /proc/meminfo MemTotal: 264643808 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 0 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12" VERSION_ID="12" PRETTY_NAME="SUSE Linux Enterprise Server 12" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12" uname -a: Linux linux-vedd 3.12.28-4-default #1 SMP Thu Sep 25 17:02:34 UTC 2014 (9879bd4) x86_64 x86_64 x86_64 GNU/Linux run-level 3 May 6 11:28 SPEC is set to: /opt/cpu2006-1.2 Filesystem Type Size Used Avail Use% Mounted on /dev/sdy1 ext4 394G 11G 382G 3% / Additional information from dmidecode: Warning: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS Cisco Systems, Inc. C3160M3.2.0.2a.0.090920140606 09/09/2014 Memory: 16x 0xAD00 HMT42GR7AFR4C-RD 16 GB 2 rank 1866 MHz (End of data from sysinfo program) General Notes ------------- Environment variables set by runspec before the start of the run: LD_LIBRARY_PATH = "/opt/cpu2006-1.2/libs/32:/opt/cpu2006-1.2/libs/64:/opt/cpu2006-1.2/sh" Binaries compiled on a system with 1x Core i5-4670K CPU + 16GB memory using RedHat EL 7.0 Transparent Huge Pages enabled with: echo always > /sys/kernel/mm/transparent_hugepage/enabled Filesystem page cache cleared with: echo 1> /proc/sys/vm/drop_caches runspec command invoked through numactl i.e.: numactl --interleave=all runspec Base Compiler Invocation ------------------------ C benchmarks: icc -m32 -L/opt/intel/composer_xe_2015/lib/ia32 C++ benchmarks: icpc -m32 -L/opt/intel/composer_xe_2015/lib/ia32 Base Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LINUX_IA32 462.libquantum: -DSPEC_CPU_LINUX 483.xalancbmk: -DSPEC_CPU_LINUX Base Optimization Flags ----------------------- C benchmarks: -xSSE4.2 -ipo -O3 -no-prec-div -opt-prefetch -opt-mem-layout-trans=3 C++ benchmarks: -xSSE4.2 -ipo -O3 -no-prec-div -opt-prefetch -opt-mem-layout-trans=3 -Wl,-z,muldefs -L/sh -lsmartheap Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m32 -L/opt/intel/composer_xe_2015/lib/ia32 400.perlbench: icc -m64 401.bzip2: icc -m64 456.hmmer: icc -m64 458.sjeng: icc -m64 C++ benchmarks: icpc -m32 -L/opt/intel/composer_xe_2015/lib/ia32 Peak Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX_X64 401.bzip2: -DSPEC_CPU_LP64 456.hmmer: -DSPEC_CPU_LP64 458.sjeng: -DSPEC_CPU_LP64 462.libquantum: -DSPEC_CPU_LINUX 483.xalancbmk: -DSPEC_CPU_LINUX Peak Optimization Flags ----------------------- C benchmarks: 400.perlbench: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -auto-ilp32 401.bzip2: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -opt-prefetch -auto-ilp32 -ansi-alias 403.gcc: -xSSE4.2 -ipo -O3 -no-prec-div 429.mcf: basepeak = yes 445.gobmk: -xSSE4.2(pass 2) -prof-gen(pass 1) -prof-use(pass 2) -ansi-alias -opt-mem-layout-trans=3 456.hmmer: -xSSE4.2 -ipo -O3 -no-prec-div -unroll2 -auto-ilp32 458.sjeng: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -unroll4 -auto-ilp32 462.libquantum: basepeak = yes 464.h264ref: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -unroll2 -ansi-alias C++ benchmarks: 471.omnetpp: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=block -Wl,-z,muldefs -L/sh -lsmartheap 473.astar: basepeak = yes 483.xalancbmk: basepeak = yes Peak Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic15.0-official-linux64.html http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revC.20150505.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2006/flags/Intel-ic15.0-official-linux64.xml http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revC.20150505.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2015 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.2. Report generated on Thu Jul 2 11:02:56 2015 by CPU2006 ASCII formatter v6932. Originally published on 2 July 2015.