SPEC(R) CINT2006 Summary Cisco Systems Cisco UCS C240 M4 (Intel Xeon E5-2680 v3 @ 2.50GHz) Sun Dec 21 21:37:21 2014 CPU2006 License: 9019 Test date: Dec-2014 Test sponsor: Cisco Systems Hardware availability: Sep-2014 Tested by: Cisco Systems Software availability: Jul-2014 Base Base Base Peak Peak Peak Benchmarks Ref. Run Time Ratio Ref. Run Time Ratio -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 9770 252 38.8 S 400.perlbench 9770 252 38.7 * 400.perlbench 9770 253 38.6 S 401.bzip2 9650 411 23.5 S 401.bzip2 9650 410 23.5 * 401.bzip2 9650 410 23.5 S 403.gcc 8050 237 34.0 S 403.gcc 8050 237 34.0 * 403.gcc 8050 237 33.9 S 429.mcf 9120 160 57.1 S 429.mcf 9120 159 57.4 S 429.mcf 9120 159 57.4 * 445.gobmk 10490 382 27.5 * 445.gobmk 10490 382 27.5 S 445.gobmk 10490 383 27.4 S 456.hmmer 9330 143 65.4 S 456.hmmer 9330 142 65.5 S 456.hmmer 9330 142 65.5 * 458.sjeng 12100 375 32.2 S 458.sjeng 12100 376 32.2 S 458.sjeng 12100 375 32.2 * 462.libquantum 20720 3.23 6410 S 462.libquantum 20720 3.23 6410 * 462.libquantum 20720 3.20 6480 S 464.h264ref 22130 467 47.4 * 464.h264ref 22130 467 47.4 S 464.h264ref 22130 467 47.4 S 471.omnetpp 6250 168 37.1 S 471.omnetpp 6250 174 36.0 S 471.omnetpp 6250 169 37.1 * 473.astar 7020 221 31.8 S 473.astar 7020 219 32.1 S 473.astar 7020 220 31.8 * 483.xalancbmk 6900 109 63.2 * 483.xalancbmk 6900 109 63.6 S 483.xalancbmk 6900 111 62.3 S ============================================================================== 400.perlbench 9770 252 38.7 * 401.bzip2 9650 410 23.5 * 403.gcc 8050 237 34.0 * 429.mcf 9120 159 57.4 * 445.gobmk 10490 382 27.5 * 456.hmmer 9330 142 65.5 * 458.sjeng 12100 375 32.2 * 462.libquantum 20720 3.23 6410 * 464.h264ref 22130 467 47.4 * 471.omnetpp 6250 169 37.1 * 473.astar 7020 220 31.8 * 483.xalancbmk 6900 109 63.2 * SPECint(R)_base2006 60.3 SPECint2006 Not Run HARDWARE -------- CPU Name: Intel Xeon E5-2680 v3 CPU Characteristics: Intel Turbo Boost Technology up to 3.30 GHz CPU MHz: 2500 FPU: Integrated CPU(s) enabled: 24 cores, 2 chips, 12 cores/chip CPU(s) orderable: 1,2 chips Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 256 KB I+D on chip per core L3 Cache: 30 MB I+D on chip per chip Other Cache: None Memory: 256 GB (16 x 16 GB 2Rx4 PC4-2133P-R) Disk Subsystem: 1 x 300GB SAS, 15K RPM Other Hardware: None SOFTWARE -------- Operating System: Red Hat Enterprise Linux Server release 7.0 (Maipo) 3.10.0-123.el7.x86_64 Compiler: C/C++: Version 15.0.0.090 of Intel C++ Studio XE for Linux Auto Parallel: Yes File System: xfs System State: Run level 3 (multi-user) Base Pointers: 32/64-bit Peak Pointers: 32/64-bit Other Software: Microquill SmartHeap V10.0 Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" System Tuning Profile set to throughput-performance using tuned-adm with: tuned-adm profile throughput-performance Platform Notes -------------- CPU performance set to HPC Power Technology set to Custom Processor Power State C6 set to Disabled Energy Performance BIAS setting set to Performance Memory RAS configuration set to Maximum Performance Snoop Mode set to Early Snoop Intel Hyper-Threading Technology option set to Disabled Sysinfo program /opt/cpu2006-1.2/config/sysinfo.rev6914 $Rev: 6914 $ $Date:: 2014-06-25 #$ e3fbb8667b5a285932ceab81e28219e1 running on localhost.localdomain Sun Dec 21 21:37:22 2014 This section contains SUT (System Under Test) info as seen by some common utilities. To remove or add to this section, see: http://www.spec.org/cpu2006/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) CPU E5-2680 v3 @ 2.50GHz 2 "physical id"s (chips) 24 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 12 siblings : 12 physical 0: cores 0 1 2 3 4 5 8 9 10 11 12 13 physical 1: cores 0 1 2 3 4 5 8 9 10 11 12 13 cache size : 30720 KB From /proc/meminfo MemTotal: 263706176 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* os-release: NAME="Red Hat Enterprise Linux Server" VERSION="7.0 (Maipo)" ID="rhel" ID_LIKE="fedora" VERSION_ID="7.0" PRETTY_NAME="Red Hat Enterprise Linux Server 7.0 (Maipo)" ANSI_COLOR="0;31" CPE_NAME="cpe:/o:redhat:enterprise_linux:7.0:GA:server" redhat-release: Red Hat Enterprise Linux Server release 7.0 (Maipo) system-release: Red Hat Enterprise Linux Server release 7.0 (Maipo) system-release-cpe: cpe:/o:redhat:enterprise_linux:7.0:ga:server uname -a: Linux localhost.localdomain 3.10.0-123.el7.x86_64 #1 SMP Mon May 5 11:16:57 EDT 2014 x86_64 x86_64 x86_64 GNU/Linux run-level 3 Dec 20 19:56 SPEC is set to: /opt/cpu2006-1.2 Filesystem Type Size Used Avail Use% Mounted on /dev/sda1 xfs 350G 23G 328G 7% / Additional information from dmidecode: Warning: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS Cisco Systems, Inc. C240M4.2.0.3c.0.091920142008 09/19/2014 Memory: 16x 0xCE00 M393A2G40DB0-CPB 16 GB 2 rank 2133 MHz 8x NO DIMM NO DIMM (End of data from sysinfo program) General Notes ------------- Environment variables set by runspec before the start of the run: KMP_AFFINITY = "granularity=fine,compact,1,0" LD_LIBRARY_PATH = "/opt/cpu2006-1.2/libs/32:/opt/cpu2006-1.2/libs/64:/opt/cpu2006-1.2/sh" OMP_NUM_THREADS = "24" Binaries compiled on a system with 1x Core i5-4670K CPU + 16GB memory using RedHat EL 7.0 Transparent Huge Pages enabled with: echo always > /sys/kernel/mm/transparent_hugepage/enabled Filesystem page cache cleared with: echo 1> /proc/sys/vm/drop_caches runspec command invoked through numactl i.e.: numactl --interleave=all runspec Base Compiler Invocation ------------------------ C benchmarks: icc -m64 C++ benchmarks: icpc -m64 Base Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX_X64 401.bzip2: -DSPEC_CPU_LP64 403.gcc: -DSPEC_CPU_LP64 429.mcf: -DSPEC_CPU_LP64 445.gobmk: -DSPEC_CPU_LP64 456.hmmer: -DSPEC_CPU_LP64 458.sjeng: -DSPEC_CPU_LP64 462.libquantum: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX 464.h264ref: -DSPEC_CPU_LP64 471.omnetpp: -DSPEC_CPU_LP64 473.astar: -DSPEC_CPU_LP64 483.xalancbmk: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX Base Optimization Flags ----------------------- C benchmarks: -xCORE-AVX2 -ipo -O3 -no-prec-div -parallel -opt-prefetch -auto-p32 C++ benchmarks: -xCORE-AVX2 -ipo -O3 -no-prec-div -opt-prefetch -auto-p32 -Wl,-z,muldefs -L/sh -lsmartheap64 Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic15.0-official-linux64.html http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revC.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2006/flags/Intel-ic15.0-official-linux64.xml http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revC.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2015 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.2. Report generated on Wed Jan 14 10:29:00 2015 by CPU2006 ASCII formatter v6932. Originally published on 13 January 2015.