SPEC® CFP2006 Result

Copyright 2006-2014 Standard Performance Evaluation Corporation

Cisco Systems

Cisco UCS C420 M3 (Intel Xeon E5-4650, 2.70 GHz)

CPU2006 license: 9019 Test date: Jun-2014
Test sponsor: Cisco Systems Hardware Availability: Sep-2012
Tested by: Cisco Systems Software Availability: Sep-2013
Benchmark results graph
Hardware
CPU Name: Intel Xeon E5-4650
CPU Characteristics: Intel Turbo Boost Technology up to 3.30 GHz
CPU MHz: 2700
FPU: Integrated
CPU(s) enabled: 32 cores, 4 chips, 8 cores/chip, 2 threads/core
CPU(s) orderable: 1,2,3,4 chip
Primary Cache: 32 KB I + 32 KB D on chip per core
Secondary Cache: 256 KB I+D on chip per core
L3 Cache: 20 MB I+D on chip per chip
Other Cache: None
Memory: 512 GB (32 x 16 GB 2Rx4 PC3-12800R-11, ECC)
Disk Subsystem: 1 X 100 GB SAS SSD
Other Hardware: None
Software
Operating System: Red Hat Enterprise Linux Server release 6.3
(Santiago)
2.6.32-279.el6.x86_64
Compiler: C/C++: Version 14.0.0.080 of Intel C++ Studio XE
for Linux;
Fortran: Version 14.0.0.080 of Intel Fortran
Studio XE for Linux
Auto Parallel: No
File System: ext4
System State: Run level 5 (multi-user)
Base Pointers: 32/64-bit
Peak Pointers: 32/64-bit
Other Software: None

Results Table

Benchmark Base Peak
Copies Seconds Ratio Seconds Ratio Seconds Ratio Copies Seconds Ratio Seconds Ratio Seconds Ratio
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
410.bwaves 64 1323 657 1325 656 1323 657 64 1323 657 1325 656 1323 657
416.gamess 64 1250 1000 1254 999 1246 1010 64 1232 1020 1232 1020 1259 995
433.milc 64 895 656 894 657 895 656 64 894 657 893 658 893 658
434.zeusmp 64 581 1000 581 1000 586 995 64 581 1000 581 1000 586 995
435.gromacs 64 372 1230 372 1230 371 1230 64 364 1250 365 1250 366 1250
436.cactusADM 64 664 1150 664 1150 663 1150 64 664 1150 664 1150 663 1150
437.leslie3d 64 1227 490 1225 491 1226 491 32 580 519 578 520 577 521
444.namd 64 644 797 647 793 654 785 64 641 801 639 803 639 803
447.dealII 64 445 1650 440 1670 437 1680 64 445 1650 440 1670 437 1680
450.soplex 64 1067 500 1069 499 1069 499 32 474 564 474 563 474 563
453.povray 64 251 1360 252 1350 250 1360 64 217 1570 215 1590 216 1570
454.calculix 64 367 1440 366 1440 367 1440 64 367 1440 366 1440 367 1440
459.GemsFDTD 64 1431 475 1430 475 1433 474 64 1431 475 1430 475 1433 474
465.tonto 64 609 1030 607 1040 606 1040 64 589 1070 583 1080 585 1080
470.lbm 64 947 929 947 928 947 929 64 947 929 947 928 947 929
481.wrf 64 836 855 835 856 836 855 64 832 859 832 859 828 864
482.sphinx3 64 1574 793 1576 791 1573 793 64 1609 775 1611 774 1612 774

Submit Notes

 The numactl mechanism was used to bind copies to processors. The config file option 'submit'
 was used to generate numactl commands to bind each copy to a specific processor.
 For details, please see the config file.

Operating System Notes

 Stack size set to unlimited using "ulimit -s unlimited"

Platform Notes

BIOS Settings:
Intel HT Technology = Enabled
CPU performance set to HPC
Power Technology set to Custom
CPU Power State C6 set to Enabled
CPU Power State C1 Enhanced set to Disabled
Energy Performance policy set to Performance
Memory RAS configuration set to Maximum Performance
DRAM Clock Throttling Set to Performance
LV DDR Mode set to Performance-mode
DRAM Refresh Rate Set to 1x
 Sysinfo program /home/cpu2006/config/sysinfo.rev6818
 $Rev: 6818 $ $Date:: 2012-07-17 #$ e86d102572650a6e4d596a3cee98f191
 running on Arsenal Sun Jun  8 15:11:46 2014

 This section contains SUT (System Under Test) info as seen by
 some common utilities.  To remove or add to this section, see:
   http://www.spec.org/cpu2006/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : Intel(R) Xeon(R) CPU E5-4650 0 @ 2.70GHz
       4 "physical id"s (chips)
       64 "processors"
    cores, siblings (Caution: counting these is hw and system dependent.  The
    following excerpts from /proc/cpuinfo might not be reliable.  Use with
    caution.)
       cpu cores : 8
       siblings  : 16
       physical 0: cores 0 1 2 3 4 5 6 7
       physical 1: cores 0 1 2 3 4 5 6 7
       physical 2: cores 0 1 2 3 4 5 6 7
       physical 3: cores 0 1 2 3 4 5 6 7
    cache size : 20480 KB

 From /proc/meminfo
    MemTotal:       529406984 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 /usr/bin/lsb_release -d
    Red Hat Enterprise Linux Server release 6.3 (Santiago)

 From /etc/*release* /etc/*version*
    redhat-release: Red Hat Enterprise Linux Server release 6.3 (Santiago)
    system-release: Red Hat Enterprise Linux Server release 6.3 (Santiago)
    system-release-cpe: cpe:/o:redhat:enterprise_linux:6server:ga:server

 uname -a:
    Linux Arsenal 2.6.32-279.el6.x86_64 #1 SMP Wed Jun 13 18:24:36 EDT 2012
    x86_64 x86_64 x86_64 GNU/Linux

 run-level 5 Jun 8 15:10

 SPEC is set to: /home/cpu2006
    Filesystem    Type    Size  Used Avail Use% Mounted on
    /dev/mapper/vg_arsenal-lv_home
                  ext4     81G  7.8G   69G  11% /home

 Additional information from dmidecode:
   BIOS Cisco Systems, Inc. C420M3.1.5.7.0.042820140524 04/28/2014
   Memory:
    32x 0xCE00 M393B2G70BH0-YK0 16 GB 1600 MHz 2 rank
    16x NO DIMM NO DIMM

 (End of data from sysinfo program)

General Notes

Environment variables set by runspec before the start of the run:
LD_LIBRARY_PATH = "/home/cpu2006/libs/32:/home/cpu2006/libs/64:/home/cpu2006/sh"

 Binaries compiled on a system with 1x Core i7-860 CPU + 8GB
 memory using RedHat EL 6.4
 Transparent Huge Pages enabled with:
 echo always > /sys/kernel/mm/redhat_transparent_hugepage/enabled
 Filesystem page cache cleared with:
 echo 1>       /proc/sys/vm/drop_caches
 runspec command invoked through numactl i.e.:
 numactl --interleave=all runspec <etc>

Base Compiler Invocation

C benchmarks:

 icc -m64 

C++ benchmarks:

 icpc -m64 

Fortran benchmarks:

 ifort -m64 

Benchmarks using both Fortran and C:

 icc -m64   ifort -m64 

Base Portability Flags

410.bwaves:  -DSPEC_CPU_LP64 
416.gamess:  -DSPEC_CPU_LP64 
433.milc:  -DSPEC_CPU_LP64 
434.zeusmp:  -DSPEC_CPU_LP64 
435.gromacs:  -DSPEC_CPU_LP64   -nofor_main 
436.cactusADM:  -DSPEC_CPU_LP64   -nofor_main 
437.leslie3d:  -DSPEC_CPU_LP64 
444.namd:  -DSPEC_CPU_LP64 
447.dealII:  -DSPEC_CPU_LP64 
450.soplex:  -DSPEC_CPU_LP64 
453.povray:  -DSPEC_CPU_LP64 
454.calculix:  -DSPEC_CPU_LP64   -nofor_main 
459.GemsFDTD:  -DSPEC_CPU_LP64 
465.tonto:  -DSPEC_CPU_LP64 
470.lbm:  -DSPEC_CPU_LP64 
481.wrf:  -DSPEC_CPU_LP64   -DSPEC_CPU_CASE_FLAG   -DSPEC_CPU_LINUX 
482.sphinx3:  -DSPEC_CPU_LP64 

Base Optimization Flags

C benchmarks:

 -xAVX   -ipo   -O3   -no-prec-div   -opt-prefetch   -auto-p32   -ansi-alias   -opt-mem-layout-trans=3 

C++ benchmarks:

 -xAVX   -ipo   -O3   -no-prec-div   -opt-prefetch   -auto-p32   -ansi-alias   -opt-mem-layout-trans=3 

Fortran benchmarks:

 -xAVX   -ipo   -O3   -no-prec-div   -opt-prefetch 

Benchmarks using both Fortran and C:

 -xAVX   -ipo   -O3   -no-prec-div   -opt-prefetch   -auto-p32   -ansi-alias   -opt-mem-layout-trans=3 

Peak Compiler Invocation

C benchmarks (except as noted below):

 icc -m64 
482.sphinx3:  icc -m32 

C++ benchmarks (except as noted below):

 icpc -m64 
450.soplex:  icpc -m32 

Fortran benchmarks:

 ifort -m64 

Benchmarks using both Fortran and C:

 icc -m64   ifort -m64 

Peak Portability Flags

410.bwaves:  -DSPEC_CPU_LP64 
416.gamess:  -DSPEC_CPU_LP64 
433.milc:  -DSPEC_CPU_LP64 
434.zeusmp:  -DSPEC_CPU_LP64 
435.gromacs:  -DSPEC_CPU_LP64   -nofor_main 
436.cactusADM:  -DSPEC_CPU_LP64   -nofor_main 
437.leslie3d:  -DSPEC_CPU_LP64 
444.namd:  -DSPEC_CPU_LP64 
447.dealII:  -DSPEC_CPU_LP64 
453.povray:  -DSPEC_CPU_LP64 
454.calculix:  -DSPEC_CPU_LP64   -nofor_main 
459.GemsFDTD:  -DSPEC_CPU_LP64 
465.tonto:  -DSPEC_CPU_LP64 
470.lbm:  -DSPEC_CPU_LP64 
481.wrf:  -DSPEC_CPU_LP64   -DSPEC_CPU_CASE_FLAG   -DSPEC_CPU_LINUX 

Peak Optimization Flags

C benchmarks:

433.milc:  -xAVX(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -opt-mem-layout-trans=3(pass 2)   -prof-use(pass 2)   -auto-ilp32 
470.lbm:  basepeak = yes 
482.sphinx3:  -xAVX   -ipo   -O3   -no-prec-div   -opt-mem-layout-trans=3   -unroll2 

C++ benchmarks:

444.namd:  -xAVX(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -opt-mem-layout-trans=3(pass 2)   -prof-use(pass 2)   -fno-alias   -auto-ilp32 
447.dealII:  basepeak = yes 
450.soplex:  -xAVX(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -opt-mem-layout-trans=3(pass 2)   -prof-use(pass 2)   -opt-malloc-options=3 
453.povray:  -xAVX(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -opt-mem-layout-trans=3(pass 2)   -prof-use(pass 2)   -unroll4   -ansi-alias 

Fortran benchmarks:

410.bwaves:  basepeak = yes 
416.gamess:  -xAVX(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -unroll2   -inline-level=0   -scalar-rep- 
434.zeusmp:  basepeak = yes 
437.leslie3d:  -xAVX   -ipo   -O3   -no-prec-div   -opt-prefetch 
459.GemsFDTD:  basepeak = yes 
465.tonto:  -xAVX(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -unroll4   -auto   -inline-calloc   -opt-malloc-options=3 

Benchmarks using both Fortran and C:

435.gromacs:  -xAVX(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -opt-mem-layout-trans=3(pass 2)   -prof-use(pass 2)   -opt-prefetch   -auto-ilp32 
436.cactusADM:  basepeak = yes 
454.calculix:  basepeak = yes 
481.wrf:  -xAVX   -ipo   -O3   -no-prec-div   -auto-ilp32 

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2006/flags/Intel-ic14.0-official-linux64.20140128.html,
http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revB.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2006/flags/Intel-ic14.0-official-linux64.20140128.xml,
http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revB.xml.