SPEC(R) CINT2006 Summary Cisco Systems Cisco UCS B420 M3 (Intel Xeon E5-4620, 2.2 GHz) Wed Nov 7 09:49:55 2012 CPU2006 License: 9019 Test date: Nov-2012 Test sponsor: Cisco Systems Hardware availability: Sep-2012 Tested by: Cisco Systems Software availability: Feb-2012 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 64 843 741 S 64 734 852 S 400.perlbench 64 843 741 * 64 730 856 S 400.perlbench 64 846 739 S 64 732 854 * 401.bzip2 64 1188 520 * 64 1176 525 S 401.bzip2 64 1196 516 S 64 1162 531 S 401.bzip2 64 1187 520 S 64 1167 529 * 403.gcc 64 704 732 S 64 708 727 S 403.gcc 64 703 733 S 64 707 729 S 403.gcc 64 703 732 * 64 708 727 * 429.mcf 64 457 1280 * 64 457 1280 * 429.mcf 64 456 1280 S 64 456 1280 S 429.mcf 64 457 1280 S 64 457 1280 S 445.gobmk 64 898 748 * 64 874 768 S 445.gobmk 64 892 753 S 64 879 764 * 445.gobmk 64 901 746 S 64 882 761 S 456.hmmer 64 496 1200 S 64 437 1370 S 456.hmmer 64 496 1200 * 64 433 1380 S 456.hmmer 64 495 1210 S 64 434 1370 * 458.sjeng 64 1037 747 S 64 995 778 S 458.sjeng 64 1035 748 * 64 994 779 S 458.sjeng 64 1035 748 S 64 995 778 * 462.libquantum 64 235 5640 S 64 235 5640 S 462.libquantum 64 235 5640 S 64 235 5640 S 462.libquantum 64 235 5640 * 64 235 5640 * 464.h264ref 64 1131 1250 * 64 1132 1250 S 464.h264ref 64 1126 1260 S 64 1122 1260 S 464.h264ref 64 1148 1230 S 64 1127 1260 * 471.omnetpp 64 683 585 S 64 640 625 * 471.omnetpp 64 681 587 S 64 641 624 S 471.omnetpp 64 681 587 * 64 639 626 S 473.astar 64 781 575 S 64 781 575 S 473.astar 64 780 576 S 64 780 576 S 473.astar 64 781 575 * 64 781 575 * 483.xalancbmk 64 459 963 * 64 459 963 * 483.xalancbmk 64 460 961 S 64 460 961 S 483.xalancbmk 64 458 965 S 64 458 965 S ============================================================================== 400.perlbench 64 843 741 * 64 732 854 * 401.bzip2 64 1188 520 * 64 1167 529 * 403.gcc 64 703 732 * 64 708 727 * 429.mcf 64 457 1280 * 64 457 1280 * 445.gobmk 64 898 748 * 64 879 764 * 456.hmmer 64 496 1200 * 64 434 1370 * 458.sjeng 64 1035 748 * 64 995 778 * 462.libquantum 64 235 5640 * 64 235 5640 * 464.h264ref 64 1131 1250 * 64 1127 1260 * 471.omnetpp 64 681 587 * 64 640 625 * 473.astar 64 781 575 * 64 781 575 * 483.xalancbmk 64 459 963 * 64 459 963 * SPECint(R)_rate_base2006 952 SPECint_rate2006 986 HARDWARE -------- CPU Name: Intel Xeon E5-4620 CPU Characteristics: Intel Turbo Boost Technology up to 2.60 GHz CPU MHz: 2200 FPU: Integrated CPU(s) enabled: 32 cores, 4 chips, 8 cores/chip, 2 threads/core CPU(s) orderable: 1,2,3,4 chips Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 256 KB I+D on chip per core L3 Cache: 16 MB I+D on chip per chip Other Cache: None Memory: 256 GB (32 x 8 GB 2Rx4 PC3-12800R-11, ECC) Disk Subsystem: 1 X 300 GB 15000 RPM SAS Other Hardware: None SOFTWARE -------- Operating System: Red Hat Enterprise Linux Server release 6.2 (Santiago) 2.6.32-220.el6.x86_64 Compiler: C/C++: Version 12.1.3.293 of Intel C++ Studio XE for Linux Auto Parallel: No File System: ext4 System State: Run level 3 (multi-user) Base Pointers: 32-bit Peak Pointers: 32/64-bit Other Software: Microquill SmartHeap V9.01 Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Platform Notes -------------- BIOS Configuration: Hyper-Threading set to Enabled Processor C6 Report set to Disabled Processor C1E set to Disabled CPU Performance set to HPC LV DDR Mode set to Performance-mode Sysinfo program /opt/cpu2006-1.2/config/sysinfo.rev6800 $Rev: 6800 $ $Date:: 2011-10-11 #$ 6f2ebdff5032aaa42e583f96b07f99d3 running on localhost.localdomain Wed Nov 7 06:49:56 2012 This section contains SUT (System Under Test) info as seen by some common utilities. To remove or add to this section, see: http://www.spec.org/cpu2006/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) CPU E5-4620 0 @ 2.20GHz 4 "physical id"s (chips) 64 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 8 siblings : 16 physical 0: cores 0 1 2 3 4 5 6 7 physical 1: cores 0 1 2 3 4 5 6 7 physical 2: cores 0 1 2 3 4 5 6 7 physical 3: cores 0 1 2 3 4 5 6 7 cache size : 16384 KB From /proc/meminfo MemTotal: 264502052 kB HugePages_Total: 0 Hugepagesize: 2048 kB /usr/bin/lsb_release -d Red Hat Enterprise Linux Server release 6.2 (Santiago) From /etc/*release* /etc/*version* redhat-release: Red Hat Enterprise Linux Server release 6.2 (Santiago) system-release: Red Hat Enterprise Linux Server release 6.2 (Santiago) system-release-cpe: cpe:/o:redhat:enterprise_linux:6server:ga:server uname -a: Linux localhost.localdomain 2.6.32-220.el6.x86_64 #1 SMP Wed Nov 9 08:03:13 EST 2011 x86_64 x86_64 x86_64 GNU/Linux run-level 3 Nov 7 06:42 SPEC is set to: /opt/cpu2006-1.2 Filesystem Type Size Used Avail Use% Mounted on /dev/sda1 ext4 275G 9.9G 251G 4% / Additional information from dmidecode: Memory: 32x 0xCE00 M393B1K70DH0-YK0 8 GB 1600 MHz 2 rank (End of data from sysinfo program) General Notes ------------- Environment variables set by runspec before the start of the run: LD_LIBRARY_PATH = "/opt/cpu2006-1.2/libs/32:/opt/cpu2006-1.2/libs/64" Binaries compiled on a system with 2 X Intel Xeon E5-2690 CPU + 128 GB memory using RHEL6.2 Transparent Huge Pages enabled with: echo always > /sys/kernel/mm/redhat_transparent_hugepage/enabled Filesystem page cache cleared with: echo 1> /proc/sys/vm/drop_caches Base Compiler Invocation ------------------------ C benchmarks: icc -m32 C++ benchmarks: icpc -m32 Base Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LINUX_IA32 462.libquantum: -DSPEC_CPU_LINUX 483.xalancbmk: -DSPEC_CPU_LINUX Base Optimization Flags ----------------------- C benchmarks: -xSSE4.2 -ipo -O3 -no-prec-div -opt-prefetch -opt-mem-layout-trans=3 C++ benchmarks: -xSSE4.2 -ipo -O3 -no-prec-div -opt-prefetch -opt-mem-layout-trans=3 -Wl,-z,muldefs -L/smartheap -lsmartheap Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m32 400.perlbench: icc -m64 401.bzip2: icc -m64 456.hmmer: icc -m64 458.sjeng: icc -m64 C++ benchmarks: icpc -m32 Peak Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX_X64 401.bzip2: -DSPEC_CPU_LP64 456.hmmer: -DSPEC_CPU_LP64 458.sjeng: -DSPEC_CPU_LP64 462.libquantum: -DSPEC_CPU_LINUX 483.xalancbmk: -DSPEC_CPU_LINUX Peak Optimization Flags ----------------------- C benchmarks: 400.perlbench: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -auto-ilp32 401.bzip2: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -opt-prefetch -auto-ilp32 -ansi-alias 403.gcc: -xSSE4.2 -ipo -O3 -no-prec-div 429.mcf: basepeak = yes 445.gobmk: -xSSE4.2(pass 2) -prof-gen(pass 1) -prof-use(pass 2) -ansi-alias -opt-mem-layout-trans=3 456.hmmer: -xSSE4.2 -ipo -O3 -no-prec-div -unroll2 -auto-ilp32 458.sjeng: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -unroll4 -auto-ilp32 462.libquantum: basepeak = yes 464.h264ref: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -unroll2 -ansi-alias C++ benchmarks: 471.omnetpp: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=block -Wl,-z,muldefs -L/smartheap -lsmartheap 473.astar: basepeak = yes 483.xalancbmk: basepeak = yes Peak Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic12.1-official-linux64.20120425.html http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2.20130607.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2006/flags/Intel-ic12.1-official-linux64.20120425.xml http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2.20130607.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2014 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.2. Report generated on Thu Jul 24 13:36:33 2014 by CPU2006 ASCII formatter v6932. Originally published on 19 December 2012.