SPEC® CINT2006 Result

Cisco Systems

Cisco UCS C200 M2 (Intel Xeon E5620, 2.40 GHz)

Hardware
CPU Name:	Intel Xeon E5620
CPU Characteristics:	Intel Turbo Boost Technology up to 2.67 GHz
CPU MHz:	2400
FPU:	Integrated
CPU(s) enabled:	8 cores, 2 chips, 4 cores/chip, 2 threads/core
CPU(s) orderable:	1 ,2 chips
Primary Cache:	32 KB I + 32 KB D on chip per core
Secondary Cache:	256 KB I+D on chip per core
L3 Cache:	12 MB I+D on chip per chip
Other Cache:	None
Memory:	48 GB (12 x 4 GB 2Rx4 PC3-10600R-9, ECC, running at 1066 MHz)
Disk Subsystem:	146 GB SAS, 10K RPM
Other Hardware:	None

Software
Operating System:	SuSe Linux Enterprise Server 11 (x86_64), Kernel 2.6.27-15-2-default, RC4
Compiler:	Intel C++ Professional Compiler for IA32 and Intel 64, Version 11.1 Build 20091130 Package ID: l_cproc_p_11.1.064
Auto Parallel:	No
File System:	ext3
System State:	Run level 3 (multi-user)
Base Pointers:	32-bit
Peak Pointers:	32/64-bit
Other Software:	MicroQuill SmartHeap Library V8.1

Results Table

Benchmark	Base							Peak
Benchmark	Copies	Seconds	Ratio	Seconds	Ratio	Seconds	Ratio	Copies	Seconds	Ratio	Seconds	Ratio	Seconds	Ratio
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
400.perlbench	16	919	170	921	170	911	172	16	787	199	772	202	772	203
401.bzip2	16	1155	134	1150	134	1151	134	16	1086	142	1086	142	1087	142
403.gcc	16	720	179	712	181	716	180	16	725	178	725	178	731	176
429.mcf	16	584	250	585	250	581	251	12	533	205	538	203	529	207
445.gobmk	16	857	196	859	195	855	196	16	779	215	783	214	788	213
456.hmmer	16	553	270	554	269	571	261	12	421	266	422	266	421	266
458.sjeng	16	1057	183	1058	183	1059	183	16	964	201	962	201	961	202
462.libquantum	16	520	637	521	637	520	637	16	522	636	516	642	517	641
464.h264ref	16	1396	254	1369	259	1366	259	16	1384	256	1357	261	1334	265
471.omnetpp	16	607	165	607	165	606	165	16	555	180	556	180	556	180
473.astar	16	864	130	866	130	871	129	16	766	147	768	146	768	146
483.xalancbmk	16	488	226	488	226	488	226	16	488	226	488	226	488	226

The config file option 'submit' was used.
 numactl was used to bind copies to the cores

ulimit -s unlimited was used to set the stacksize to unlimited prior to run

Binaries were compiled on SLES 10 with Binutils 2.18.50.0.7.20080502

icc -m32

icpc -m32

-xSSE4.2 -ipo -O3 -no-prec-div -static -opt-prefetch

403.gcc:

	icpc -m32
473.astar:	icpc -m64

400.perlbench:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -ansi-alias
401.bzip2:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -opt-prefetch -ansi-alias -auto-ilp32
403.gcc:	-xSSE4.2 -ipo -O3 -no-prec-div -static
429.mcf:	-xSSE4.2 -ipo -O3 -no-prec-div -static -opt-prefetch
445.gobmk:	-xSSE4.2(pass 2) -prof-gen(pass 1) -prof-use(pass 2) -O2 -ipo -no-prec-div -ansi-alias
456.hmmer:	-xSSE4.2 -ipo -O3 -no-prec-div -static -unroll2 -ansi-alias -auto-ilp32
458.sjeng:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -unroll4 -auto-ilp32
462.libquantum:	-xSSE4.2 -ipo -O3 -no-prec-div -static -auto-ilp32 -opt-prefetch
464.h264ref:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -unroll2 -ansi-alias

471.omnetpp:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=block -Wl,-z,muldefs -L/home/cmplr/usr3/alrahate/cpu2006.1.1.ic11.1/libic11.1-32bit -lsmartheap
473.astar:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=routine -Wl,-z,muldefs -L/home/cmplr/usr3/alrahate/cpu2006.1.1.ic11.1/libic11.1-64bit -lsmartheap64
483.xalancbmk:	basepeak = yes

403.gcc:

You can also download the XML flags source by saving the following link:
http://www.spec.org/cpu2006/flags/Intel-ic11.1-linux64-revG.20100929.xml.