SPEC® CINT2006 Result

Cisco Systems

Cisco UCS C460 M1 (Intel Xeon X7550, 2.00 GHz)

Hardware
CPU Name:	Intel Xeon X7550
CPU Characteristics:	Intel Turbo Boost Technology up to 2.40 GHz
CPU MHz:	2000
FPU:	Integrated
CPU(s) enabled:	32 cores, 4 chips, 8 cores/chip, 2 threads/core
CPU(s) orderable:	1,2,3,4 chips
Primary Cache:	32 KB I + 32 KB D on chip per core
Secondary Cache:	256 KB I+D on chip per core
L3 Cache:	18 MB I+D on chip per chip
Other Cache:	None
Memory:	512 GB (64 x 8 GB 4Rx4 PC3-8500R, ECC)
Disk Subsystem:	146 GB SAS, 15K RPM
Other Hardware:	None

Software
Operating System:	SuSe Linux Enterprise Server 11 (x86_64), Kernel 2.6.27-19-5-default
Compiler:	Intel C++ Professional Compiler for IA32 and Intel 64, Version 11.1 Build 20091130 Package ID: l_cproc_p_11.1.064
Auto Parallel:	No
File System:	ext3
System State:	Run level 3 (multi-user)
Base Pointers:	32-bit
Peak Pointers:	32/64-bit
Other Software:	MicroQuill SmartHeap Library V8.1

Results Table

Benchmark	Base							Peak
Benchmark	Copies	Seconds	Ratio	Seconds	Ratio	Seconds	Ratio	Copies	Seconds	Ratio	Seconds	Ratio	Seconds	Ratio
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
400.perlbench	64	1128	554	1118	559	1109	564	64	946	661	963	649	963	649
401.bzip2	64	1552	398	1544	400	1561	396	64	1472	420	1471	420	1470	420
403.gcc	64	1009	511	1013	508	1014	508	64	1021	505	1030	500	1019	506
429.mcf	64	774	754	772	756	773	755	64	773	755	773	755	774	754
445.gobmk	64	1039	646	1035	649	1040	645	64	952	706	952	705	953	705
456.hmmer	64	662	903	668	893	662	902	64	530	1130	529	1130	531	1130
458.sjeng	64	1307	592	1307	593	1306	593	64	1191	650	1191	650	1188	652
462.libquantum	64	773	1720	774	1710	775	1710	64	774	1710	772	1720	773	1720
464.h264ref	64	1716	825	1714	827	1700	833	64	1686	840	1702	832	1698	834
471.omnetpp	64	910	439	910	439	910	440	64	837	478	838	478	839	477
473.astar	64	1113	404	1114	403	1114	403	64	1010	445	1009	445	1010	445
483.xalancbmk	64	632	699	631	699	632	699	64	632	699	631	699	632	699

The config file option 'submit' was used.
 numactl was used to bind copies to the cores

ulimit -s unlimited was used to set the stacksize to unlimited prior to run

Binaries were compiled on SLES 10 with Binutils 2.18.50.0.7.20080502

icc -m32

icpc -m32

-xSSE4.2 -ipo -O3 -no-prec-div -static -opt-prefetch

403.gcc:

	icpc -m32
473.astar:	icpc -m64

400.perlbench:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -ansi-alias
401.bzip2:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -opt-prefetch -ansi-alias -auto-ilp32
403.gcc:	-xSSE4.2 -ipo -O3 -no-prec-div -static
429.mcf:	-xSSE4.2 -ipo -O3 -no-prec-div -static -opt-prefetch
445.gobmk:	-xSSE4.2(pass 2) -prof-gen(pass 1) -prof-use(pass 2) -O2 -ipo -no-prec-div -ansi-alias
456.hmmer:	-xSSE4.2 -ipo -O3 -no-prec-div -static -unroll2 -ansi-alias -auto-ilp32
458.sjeng:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -unroll4 -auto-ilp32
462.libquantum:	-xSSE4.2 -ipo -O3 -no-prec-div -static -auto-ilp32 -opt-prefetch
464.h264ref:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -unroll2 -ansi-alias

471.omnetpp:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=block -Wl,-z,muldefs -L/home/cmplr/usr3/alrahate/cpu2006.1.1.ic11.1/libic11.1-32bit -lsmartheap
473.astar:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=routine -Wl,-z,muldefs -L/home/cmplr/usr3/alrahate/cpu2006.1.1.ic11.1/libic11.1-64bit -lsmartheap64
483.xalancbmk:	basepeak = yes

403.gcc:

You can also download the XML flags source by saving the following link:
http://www.spec.org/cpu2006/flags/Intel-ic11.1-linux64-revG.20101027.xml.