SPEC(R) CINT2006 Summary Intel Corporation Intel QSSC-S4R (Intel Xeon X7550, 2.00 GHz) Wed Mar 10 05:03:37 2010 CPU2006 License: 13 Test date: Mar-2010 Test sponsor: Intel Corporation Hardware availability: Mar-2010 Tested by: Intel Corporation Software availability: Jan-2010 Base Base Base Peak Peak Peak Benchmarks Ref. Run Time Ratio Ref. Run Time Ratio -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 9770 532 18.4 S 9770 454 21.5 S 400.perlbench 9770 526 18.6 S 9770 455 21.5 * 400.perlbench 9770 531 18.4 * 9770 456 21.4 S 401.bzip2 9650 687 14.0 S 9650 685 14.1 S 401.bzip2 9650 686 14.1 S 9650 684 14.1 S 401.bzip2 9650 687 14.1 * 9650 685 14.1 * 403.gcc 8050 545 14.8 * 8050 448 18.0 S 403.gcc 8050 543 14.8 S 8050 448 18.0 * 403.gcc 8050 546 14.7 S 8050 447 18.0 S 429.mcf 9120 331 27.5 * 9120 293 31.1 S 429.mcf 9120 330 27.6 S 9120 280 32.6 S 429.mcf 9120 335 27.2 S 9120 280 32.5 * 445.gobmk 10490 635 16.5 S 10490 553 19.0 S 445.gobmk 10490 639 16.4 S 10490 553 19.0 * 445.gobmk 10490 638 16.4 * 10490 553 19.0 S 456.hmmer 9330 276 33.8 S 9330 268 34.8 S 456.hmmer 9330 276 33.8 * 9330 268 34.8 * 456.hmmer 9330 288 32.4 S 9330 283 32.9 S 458.sjeng 12100 690 17.5 S 12100 688 17.6 S 458.sjeng 12100 691 17.5 S 12100 652 18.5 * 458.sjeng 12100 690 17.5 * 12100 652 18.5 S 462.libquantum 20720 35.9 578 S 20720 35.5 584 S 462.libquantum 20720 35.9 578 * 20720 35.5 584 * 462.libquantum 20720 36.3 571 S 20720 34.5 601 S 464.h264ref 22130 904 24.5 * 22130 758 29.2 S 464.h264ref 22130 903 24.5 S 22130 758 29.2 S 464.h264ref 22130 905 24.5 S 22130 758 29.2 * 471.omnetpp 6250 462 13.5 S 6250 313 20.0 S 471.omnetpp 6250 459 13.6 S 6250 312 20.0 * 471.omnetpp 6250 461 13.6 * 6250 311 20.1 S 473.astar 7020 475 14.8 * 7020 455 15.4 * 473.astar 7020 475 14.8 S 7020 471 14.9 S 473.astar 7020 477 14.7 S 7020 455 15.4 S 483.xalancbmk 6900 264 26.1 S 6900 264 26.1 S 483.xalancbmk 6900 265 26.0 S 6900 265 26.0 S 483.xalancbmk 6900 265 26.0 * 6900 265 26.0 * ============================================================================== 400.perlbench 9770 531 18.4 * 9770 455 21.5 * 401.bzip2 9650 687 14.1 * 9650 685 14.1 * 403.gcc 8050 545 14.8 * 8050 448 18.0 * 429.mcf 9120 331 27.5 * 9120 280 32.5 * 445.gobmk 10490 638 16.4 * 10490 553 19.0 * 456.hmmer 9330 276 33.8 * 9330 268 34.8 * 458.sjeng 12100 690 17.5 * 12100 652 18.5 * 462.libquantum 20720 35.9 578 * 20720 35.5 584 * 464.h264ref 22130 904 24.5 * 22130 758 29.2 * 471.omnetpp 6250 461 13.6 * 6250 312 20.0 * 473.astar 7020 475 14.8 * 7020 455 15.4 * 483.xalancbmk 6900 265 26.0 * 6900 265 26.0 * SPECint(R)_base2006 25.5 SPECint2006 28.6 HARDWARE -------- CPU Name: Intel Xeon X7550 CPU Characteristics: Intel Turbo Boost Technology up to 2.40 GHz CPU MHz: 2000 FPU: Integrated CPU(s) enabled: 32 cores, 4 chips, 8 cores/chip, 2 threads/core CPU(s) orderable: 1,2,4 chips Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 256 KB I+D on chip per core L3 Cache: 18 MB I+D on chip per chip Other Cache: None Memory: 256 GB (64x 4GB Quad-Rank DDR3-1066, ECC, CL9) Disk Subsystem: 146 GB SAS, 10000RPM Other Hardware: None SOFTWARE -------- Operating System: SuSe Linux Enterprise Server 11 Kernel 2.6.27.19-5 on x86_64 Compiler: Intel C++ Professional Compiler for IA32 and Intel 64, Version 11.1 Build 20091130 Package ID: l_cproc_p_11.1.064 Auto Parallel: Yes File System: ext3 System State: Run level 3 (multi-user) Base Pointers: 32-bit Peak Pointers: 32/64-bit Other Software: Microquill SmartHeap V8.1 General Notes ------------- OMP_NUM_THREADS set to number of cores KMP_AFFINITY set to granularity=fine,scatter Base Compiler Invocation ------------------------ C benchmarks: icc -m64 C++ benchmarks: icpc -m64 Base Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX_X64 401.bzip2: -DSPEC_CPU_LP64 403.gcc: -DSPEC_CPU_LP64 429.mcf: -DSPEC_CPU_LP64 445.gobmk: -DSPEC_CPU_LP64 456.hmmer: -DSPEC_CPU_LP64 458.sjeng: -DSPEC_CPU_LP64 462.libquantum: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX 464.h264ref: -DSPEC_CPU_LP64 471.omnetpp: -DSPEC_CPU_LP64 473.astar: -DSPEC_CPU_LP64 483.xalancbmk: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX Base Optimization Flags ----------------------- C benchmarks: -xSSE4.2 -ipo -O3 -no-prec-div -static -parallel -opt-prefetch C++ benchmarks: -xSSE4.2 -ipo -O3 -no-prec-div -opt-prefetch -Wl,-z,muldefs -L/home/cmplr/usr3/alrahate/cpu2006.1.1.ic11.1/libic11.1-64bit -lsmartheap64 Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m64 400.perlbench: icc -m32 429.mcf: icc -m32 445.gobmk: icc -m32 464.h264ref: icc -m32 C++ benchmarks (except as noted below): icpc -m64 471.omnetpp: icpc -m32 Peak Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LINUX_IA32 401.bzip2: -DSPEC_CPU_LP64 403.gcc: -DSPEC_CPU_LP64 456.hmmer: -DSPEC_CPU_LP64 458.sjeng: -DSPEC_CPU_LP64 462.libquantum: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX 473.astar: -DSPEC_CPU_LP64 483.xalancbmk: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX Peak Optimization Flags ----------------------- C benchmarks: 400.perlbench: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -ansi-alias -opt-prefetch 401.bzip2: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div -static(pass 2) -prof-use(pass 2) -auto-ilp32 -opt-prefetch -ansi-alias 403.gcc: -xSSE4.2 -ipo -O3 -no-prec-div -static -inline-calloc -opt-malloc-options=3 -auto-ilp32 429.mcf: -xSSE4.2 -ipo -O3 -no-prec-div -static -opt-prefetch 445.gobmk: -xSSE4.2(pass 2) -prof-gen(pass 1) -prof-use(pass 2) -O2 -ipo -no-prec-div -ansi-alias 456.hmmer: -xSSE4.2 -ipo -O3 -no-prec-div -static -unroll2 -ansi-alias -auto-ilp32 458.sjeng: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -unroll4 462.libquantum: -xSSE4.2 -ipo -O3 -no-prec-div -static -parallel -opt-prefetch -par-schedule-static=32768 -ansi-alias 464.h264ref: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -unroll2 -ansi-alias C++ benchmarks: 471.omnetpp: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=block -Wl,-z,muldefs -L/home/cmplr/usr3/alrahate/cpu2006.1.1.ic11.1/libic11.1-32bit -lsmartheap 473.astar: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=routine -Wl,-z,muldefs -L/home/cmplr/usr3/alrahate/cpu2006.1.1.ic11.1/libic11.1-64bit -lsmartheap64 483.xalancbmk: basepeak = yes Peak Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags file that was used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic11.1-linux64-revG.html You can also download the XML flags source by saving the following link: http://www.spec.org/cpu2006/flags/Intel-ic11.1-linux64-revG.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2014 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.1. Report generated on Wed Jul 23 08:06:14 2014 by CPU2006 ASCII formatter v6932. Originally published on 4 May 2010.