SPEC® CINT2006 Result

Copyright 2006-2014 Standard Performance Evaluation Corporation

Cisco Systems

Cisco UCS B200 M2 (Intel Xeon E5620, 2.40 GHz)

CPU2006 license: 9019 Test date: Feb-2010
Test sponsor: Cisco Systems Hardware Availability: Apr-2010
Tested by: Cisco Systems Software Availability: Jan-2010
Benchmark results graph
Hardware
CPU Name: Intel Xeon E5620
CPU Characteristics: Intel Turbo Boost Technology up to 2.67 GHz
CPU MHz: 2400
FPU: Integrated
CPU(s) enabled: 8 cores, 2 chips, 4 cores/chip, 2 threads/core
CPU(s) orderable: 1 ,2 chips
Primary Cache: 32 KB I + 32 KB D on chip per core
Secondary Cache: 256 KB I+D on chip per core
L3 Cache: 12 MB I+D on chip per chip
Other Cache: None
Memory: 48 GB (12x4GB, PC3-10600R, Dual Rank, ECC, see
additional details in notes)
Disk Subsystem: 146 GB SAS, 10K RPM
Other Hardware: None
Software
Operating System: SuSe Linux Enterprise Server 11 (x86_64), Kernel
2.6.27-19-5-default
Compiler: Intel C++ Professional Compiler for
IA32 and Intel 64, Version 11.1
Build 20091130 Package ID: l_cproc_p_11.1.064
Auto Parallel: No
File System: ext3
System State: Run level 3 (multi-user)
Base Pointers: 32-bit
Peak Pointers: 32/64-bit
Other Software: Binutils 2.16.91.0.7
MicroQuill SmartHeap Library V8.1

Results Table

Benchmark Base Peak
Copies Seconds Ratio Seconds Ratio Seconds Ratio Copies Seconds Ratio Seconds Ratio Seconds Ratio
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
400.perlbench 16 923 169 910 172 914 171 16 777 201 778 201 771 203
401.bzip2 16 1158 133 1160 133 1159 133 16 1092 141 1091 142 1092 141
403.gcc 16 722 178 724 178 731 176 16 724 178 745 173 725 178
429.mcf 16 587 249 587 249 586 249 8 286 255 286 255 286 255
445.gobmk 16 851 197 858 196 855 196 16 781 215 782 215 787 213
456.hmmer 16 562 266 554 269 554 270 8 256 292 255 292 255 292
458.sjeng 16 1062 182 1062 182 1062 182 16 970 200 968 200 970 200
462.libquantum 16 512 648 512 648 512 647 16 507 654 507 654 507 653
464.h264ref 16 1378 257 1386 255 1376 257 16 1375 257 1337 265 1377 257
471.omnetpp 16 613 163 612 163 613 163 16 561 178 562 178 561 178
473.astar 16 868 129 869 129 866 130 16 769 146 770 146 770 146
483.xalancbmk 16 491 225 491 225 491 225 16 491 225 491 225 491 225

Submit Notes

The config file option 'submit' was used.
 numactl was used to bind copies to the cores

Operating System Notes

ulimit -s unlimited was used to set the stacksize to unlimited prior to run

Platform Notes

The system automatically configures the memory to run at 1066 MHz.
BIOS Configuration : Data Reuse Optimization = Disabled

Base Compiler Invocation

C benchmarks:

 icc -m32 

C++ benchmarks:

 icpc -m32 

Base Portability Flags

400.perlbench:  -DSPEC_CPU_LINUX_IA32 
462.libquantum:  -DSPEC_CPU_LINUX 
483.xalancbmk:  -DSPEC_CPU_LINUX 

Base Optimization Flags

C benchmarks:

 -xSSE4.2   -ipo   -O3   -no-prec-div   -static   -opt-prefetch 

C++ benchmarks:

 -xSSE4.2   -ipo   -O3   -no-prec-div   -opt-prefetch   -Wl,-z,muldefs   -L/home/cmplr/usr3/alrahate/cpu2006.1.1.ic11.1/libic11.1-32bit -lsmartheap 

Base Other Flags

C benchmarks:

403.gcc:  -Dalloca=_alloca 

Peak Compiler Invocation

C benchmarks (except as noted below):

 icc -m32 
401.bzip2:  icc -m64 
456.hmmer:  icc -m64 
458.sjeng:  icc -m64 
462.libquantum:  icc -m64 

C++ benchmarks (except as noted below):

 icpc -m32 
473.astar:  icpc -m64 

Peak Portability Flags

400.perlbench:  -DSPEC_CPU_LINUX_IA32 
401.bzip2:  -DSPEC_CPU_LP64 
456.hmmer:  -DSPEC_CPU_LP64 
458.sjeng:  -DSPEC_CPU_LP64 
462.libquantum:  -DSPEC_CPU_LP64   -DSPEC_CPU_LINUX 
473.astar:  -DSPEC_CPU_LP64 
483.xalancbmk:  -DSPEC_CPU_LINUX 

Peak Optimization Flags

C benchmarks:

400.perlbench:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -static(pass 2)   -prof-use(pass 2)   -ansi-alias 
401.bzip2:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -static(pass 2)   -prof-use(pass 2)   -opt-prefetch   -ansi-alias   -auto-ilp32 
403.gcc:  -xSSE4.2   -ipo   -O3   -no-prec-div   -static 
429.mcf:  -xSSE4.2   -ipo   -O3   -no-prec-div   -static   -opt-prefetch 
445.gobmk:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -prof-use(pass 2)   -O2   -ipo   -no-prec-div   -ansi-alias 
456.hmmer:  -xSSE4.2   -ipo   -O3   -no-prec-div   -static   -unroll2   -ansi-alias   -auto-ilp32 
458.sjeng:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -static(pass 2)   -prof-use(pass 2)   -unroll4   -auto-ilp32 
462.libquantum:  -xSSE4.2   -ipo   -O3   -no-prec-div   -static   -auto-ilp32   -opt-prefetch 
464.h264ref:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -static(pass 2)   -prof-use(pass 2)   -unroll2   -ansi-alias 

C++ benchmarks:

471.omnetpp:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -ansi-alias   -opt-ra-region-strategy=block   -Wl,-z,muldefs   -L/home/cmplr/usr3/alrahate/cpu2006.1.1.ic11.1/libic11.1-32bit -lsmartheap 
473.astar:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -ansi-alias   -opt-ra-region-strategy=routine   -Wl,-z,muldefs   -L/home/cmplr/usr3/alrahate/cpu2006.1.1.ic11.1/libic11.1-64bit -lsmartheap64 
483.xalancbmk:  basepeak = yes 

Peak Other Flags

C benchmarks:

403.gcc:  -Dalloca=_alloca 

The flags file that was used to format this result can be browsed at
http://www.spec.org/cpu2006/flags/Intel-ic11.1-linux64-revG.20100414.html.

You can also download the XML flags source by saving the following link:
http://www.spec.org/cpu2006/flags/Intel-ic11.1-linux64-revG.20100414.xml.