SPEC(R) CINT2006 Summary Cisco Systems Cisco B200-M1 (Intel Xeon X5550, 2.66 GHz) Tue Mar 3 12:51:33 2009 CPU2006 License: 9019 Test date: May-2009 Test sponsor: Cisco Systems Hardware availability: May-2009 Tested by: Cisco Systems Software availability: May-2009 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 16 759 206 * 16 650 240 S 400.perlbench 16 758 206 S 16 661 237 S 400.perlbench 16 762 205 S 16 654 239 * 401.bzip2 16 1052 147 S 16 1001 154 S 401.bzip2 16 1053 147 * 16 990 156 * 401.bzip2 16 1072 144 S 16 989 156 S 403.gcc 16 675 191 S 16 663 194 * 403.gcc 16 664 194 S 16 678 190 S 403.gcc 16 674 191 * 16 662 195 S 429.mcf 16 537 271 * 8 271 269 S 429.mcf 16 538 271 S 8 272 268 S 429.mcf 16 536 272 S 8 272 268 * 445.gobmk 16 747 225 * 16 679 247 S 445.gobmk 16 744 225 S 16 676 248 * 445.gobmk 16 748 225 S 16 675 249 S 456.hmmer 16 888 168 S 8 342 218 S 456.hmmer 16 888 168 * 8 336 222 * 456.hmmer 16 900 166 S 8 333 224 S 458.sjeng 16 918 211 * 16 831 233 S 458.sjeng 16 917 211 S 16 828 234 S 458.sjeng 16 918 211 S 16 829 234 * 462.libquantum 16 444 747 S 16 441 751 S 462.libquantum 16 442 750 * 16 440 753 * 462.libquantum 16 442 751 S 16 440 753 S 464.h264ref 16 1194 297 S 16 1149 308 S 464.h264ref 16 1262 281 S 16 1180 300 * 464.h264ref 16 1231 288 * 16 1184 299 S 471.omnetpp 16 589 170 S 16 589 170 S 471.omnetpp 16 589 170 S 16 589 170 S 471.omnetpp 16 589 170 * 16 589 170 * 473.astar 16 758 148 S 16 684 164 * 473.astar 16 757 148 * 16 684 164 S 473.astar 16 756 149 S 16 684 164 S 483.xalancbmk 16 431 256 * 16 431 256 * 483.xalancbmk 16 434 254 S 16 434 254 S 483.xalancbmk 16 431 256 S 16 431 256 S ============================================================================== 400.perlbench 16 759 206 * 16 654 239 * 401.bzip2 16 1053 147 * 16 990 156 * 403.gcc 16 674 191 * 16 663 194 * 429.mcf 16 537 271 * 8 272 268 * 445.gobmk 16 747 225 * 16 676 248 * 456.hmmer 16 888 168 * 8 336 222 * 458.sjeng 16 918 211 * 16 829 234 * 462.libquantum 16 442 750 * 16 440 753 * 464.h264ref 16 1231 288 * 16 1180 300 * 471.omnetpp 16 589 170 * 16 589 170 * 473.astar 16 757 148 * 16 684 164 * 483.xalancbmk 16 431 256 * 16 431 256 * SPECint(R)_rate_base2006 226 SPECint_rate2006 242 HARDWARE -------- CPU Name: Intel Xeon X5550 CPU Characteristics: Intel Turbo Boost Technology up to 3.06 GHz CPU MHz: 2667 FPU: Integrated CPU(s) enabled: 8 cores, 2 chips, 4 cores/chip, 2 threads/core CPU(s) orderable: 1, 2 chips Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 256 KB I+D on chip per core L3 Cache: 8 MB I+D on chip per chip Other Cache: None Memory: 24 GB (6 x 4GB DDR3 1333 MHz) Disk Subsystem: 73 GB SAS ST973451SS, 15000 RPM Other Hardware: None SOFTWARE -------- Operating System: SUSE Linux Enterprise Server 11 (x86_64), Kernel 2.6.27.19-5-default Compiler: Intel C++ Compiler 11.0 for Linux Build 20090131 Package ID: l_cproc_p_11.0.080 Auto Parallel: No File System: ext3 System State: Run level 3 (multi-user) Base Pointers: 32-bit Peak Pointers: 32/64-bit Other Software: Microquill SmartHeap V8.1 Submit Notes ------------ The config file option 'submit' was used. numactl --localalloc --physcpubind=$BIND was used to bind copies to the cores using following bind list: bind = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 Operating System Notes ---------------------- ulimit -s unlimited was used to set the stack size General Notes ------------- Submitted_by: "Ven Immani (immaniv)" Submitted: Wed Jun 10 17:31:06 EDT 2009 Submission: cpu2006-20090601-07562.sub Submitted_by: "Ven Immani (immaniv)" Submitted: Wed Jun 10 17:35:52 EDT 2009 Submission: cpu2006-20090601-07562.sub Base Compiler Invocation ------------------------ C benchmarks: icc C++ benchmarks: icpc Base Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LINUX_IA32 462.libquantum: -DSPEC_CPU_LINUX 483.xalancbmk: -DSPEC_CPU_LINUX Base Optimization Flags ----------------------- C benchmarks: -xSSE4.2 -ipo -O3 -no-prec-div -static -inline-calloc -opt-malloc-options=3 -opt-prefetch C++ benchmarks: -xSSE4.2 -ipo -O3 -no-prec-div -opt-prefetch -Wl,-z,muldefs -L/spec/cpu2006.1.1/lib -lsmartheap Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc 401.bzip2: /opt/intel/Compiler/11.0/080/bin/intel64/icc 456.hmmer: /opt/intel/Compiler/11.0/080/bin/intel64/icc 458.sjeng: /opt/intel/Compiler/11.0/080/bin/intel64/icc C++ benchmarks (except as noted below): icpc 473.astar: /opt/intel/Compiler/11.0/080/bin/intel64/icpc Peak Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LINUX_IA32 401.bzip2: -DSPEC_CPU_LP64 456.hmmer: -DSPEC_CPU_LP64 458.sjeng: -DSPEC_CPU_LP64 462.libquantum: -DSPEC_CPU_LINUX 473.astar: -DSPEC_CPU_LP64 483.xalancbmk: -DSPEC_CPU_LINUX Peak Optimization Flags ----------------------- C benchmarks: 400.perlbench: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -ansi-alias -opt-prefetch 401.bzip2: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -opt-prefetch -ansi-alias -auto-ilp32 403.gcc: -xSSE4.2 -ipo -O3 -no-prec-div -static -inline-calloc -opt-malloc-options=3 429.mcf: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -opt-prefetch 445.gobmk: -xSSE4.2(pass 2) -prof-gen(pass 1) -prof-use(pass 2) -O2 -ipo -no-prec-div -ansi-alias 456.hmmer: -xSSE4.2 -ipo -O3 -no-prec-div -static -unroll2 -ansi-alias -auto-ilp32 458.sjeng: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -unroll4 -auto-ilp32 462.libquantum: -xSSE4.2 -ipo -O3 -no-prec-div -static -opt-malloc-options=3 -opt-prefetch 464.h264ref: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -unroll2 -ansi-alias C++ benchmarks: 471.omnetpp: basepeak = yes 473.astar: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=routine -auto-ilp32 -Wl,-z,muldefs -L/spec/cpu2006.1.1/lib -lsmartheap64 483.xalancbmk: basepeak = yes Peak Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags file that was used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic11.0-int-linux64-revA.20090710.html You can also download the XML flags source by saving the following link: http://www.spec.org/cpu2006/flags/Intel-ic11.0-int-linux64-revA.20090710.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2014 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.1. Report generated on Wed Jul 23 01:07:38 2014 by CPU2006 ASCII formatter v6932. Originally published on 23 June 2009.