SPEC(R) CINT2006 Summary Lenovo Group Limited Lenovo ThinkPad T61(Intel Core 2 Duo T7100) Test Sponsor: Intel Corporation Mon Apr 30 10:30:39 2007 CPU2006 License: 13 Test date: Jun-2007 Test sponsor: Intel Corporation Hardware availability: Jun-2007 Tested by: Intel Corporation Software availability: Feb-2007 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 2 775 25.2 * 400.perlbench 2 772 25.3 S 400.perlbench 2 776 25.2 S 401.bzip2 2 1374 14.0 S 401.bzip2 2 1307 14.8 S 401.bzip2 2 1313 14.7 * 403.gcc 2 1391 11.6 S 403.gcc 2 1386 11.6 * 403.gcc 2 1385 11.6 S 429.mcf 2 812 22.5 S 429.mcf 2 818 22.3 * 429.mcf 2 845 21.6 S 445.gobmk 2 904 23.2 S 445.gobmk 2 907 23.1 * 445.gobmk 2 908 23.1 S 456.hmmer 2 1256 14.9 S 456.hmmer 2 1265 14.8 S 456.hmmer 2 1261 14.8 * 458.sjeng 2 1105 21.9 S 458.sjeng 2 1144 21.2 S 458.sjeng 2 1108 21.8 * 462.libquantum 2 2364 17.5 S 462.libquantum 2 2432 17.0 S 462.libquantum 2 2368 17.5 * 464.h264ref 2 1232 35.9 S 464.h264ref 2 1287 34.4 S 464.h264ref 2 1236 35.8 * 471.omnetpp 2 811 15.4 S 471.omnetpp 2 851 14.7 S 471.omnetpp 2 812 15.4 * 473.astar 2 965 14.6 S 473.astar 2 985 14.3 S 473.astar 2 972 14.4 * 483.xalancbmk 2 561 24.6 S 483.xalancbmk 2 595 23.2 S 483.xalancbmk 2 568 24.3 * ============================================================================== 400.perlbench 2 775 25.2 * 401.bzip2 2 1313 14.7 * 403.gcc 2 1386 11.6 * 429.mcf 2 818 22.3 * 445.gobmk 2 907 23.1 * 456.hmmer 2 1261 14.8 * 458.sjeng 2 1108 21.8 * 462.libquantum 2 2368 17.5 * 464.h264ref 2 1236 35.8 * 471.omnetpp 2 812 15.4 * 473.astar 2 972 14.4 * 483.xalancbmk 2 568 24.3 * SPECint(R)_rate_base2006 19.1 SPECint_rate2006 Not Run HARDWARE -------- CPU Name: Intel Core 2 Duo T7100 CPU Characteristics: 1.80 GHz, 2MB L2, 800 MHz Bus CPU MHz: 1800 FPU: Integrated CPU(s) enabled: 2 cores, 1 chip, 2 cores/chip CPU(s) orderable: 1 chip Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 2 MB I+D on chip per chip L3 Cache: None Other Cache: None Memory: 2 GB (2x1GB Qimonda* PC-5300 DDR2-667 5-5-5-12) Disk Subsystem: Hitachi* HTS721010G9 SATA 100GB 7200RPM Other Hardware: None SOFTWARE -------- Operating System: Windows XP Professional w/ SP2 Compiler: Intel C++ Compiler for IA32 version 9.1 Build no 20060816 Microsoft Visual Studio .Net 2003 (for libraries) Auto Parallel: No File System: NTFS System State: Default Base Pointers: 32-bit Peak Pointers: Not Applicable Other Software: SmartHeap library V7.4 from Microquill General Notes ------------- Binaries built on Windows XP Professional w/ SP2 XP Power Profile set to AC/High Performance Base Compiler Invocation ------------------------ C benchmarks: icl -Qvc7.1 -Qc99 C++ benchmarks: icl -Qvc7.1 Base Portability Flags ---------------------- 403.gcc: -DSPEC_CPU_WIN32 464.h264ref: -DSPEC_CPU_NO_INTTYPES -DWIN32 Base Optimization Flags ----------------------- C benchmarks: -fast /F512000000 shlw32m.lib -link /FORCE:MULTIPLE C++ benchmarks: -fast -Qcxx_features /F512000000 shlw32m.lib -link /FORCE:MULTIPLE Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags file that was used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic91-ia32-flags.20090714.00.html You can also download the XML flags source by saving the following link: http://www.spec.org/cpu2006/flags/Intel-ic91-ia32-flags.20090714.00.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2014 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.0. Report generated on Tue Jul 22 12:21:34 2014 by CPU2006 ASCII formatter v6932. Originally published on 21 August 2007.