SPEC CPU2006 Platform Settings for Intel-based systems

Firmware / BIOS / Microcode Settings

Hardware Prefetch:
This BIOS option allows the enabling/disabling of a processor mechanism to prefetch data into the cache according to a pattern-recognition algorithm In some cases, setting this option to Disabled may improve performance. Users should only disable this option after performing application benchmarking to verify improved performance in their environment.
Adjacent Sector Prefetch:
This BIOS option allows the enabling/disabling of a processor mechanism to fetch the adjacent cache line within a 128-byte sector that contains the data needed due to a cache line miss. In some cases, setting this option to Disabled may improve performance. Users should only disable this option after performing application benchmarking to verify improved performance in their environment.
High Bandwidth:
Enabling this option allows the chipset to defer memory transactions and process them out of order for optimal performance.
Patrol Scrub:
Sets the patrol scrubbing which proactively searches the memory to repair correctable errors.
Per Core P-State:
When per-core P-states are enabled, each physical CPU core can operate at separate frequencies. If disabled, all cores in a package will operate at the highest resolved frequency of all active threads. If minimum variablility is desired, disable per core P-states.
COD Preference:
COD (cluster-on-die) splits the cores/caches into two halves. This improves performance for some applications. Setting the COD preference to Enable does not guarantee that COD will always be enabled. COD is only enabled if the current hardware configuration allows it.