SPEC CPU2006 Flag Description for the Intel(R) C++ Compiler 9.1 for 32-bit applications and Intel(R) Fortran Compiler 9.1 for 32-bit applications

Copyright © 2006 Intel Corporation. All Rights Reserved.

Sections

Selecting one of the following will take you directly to that section:


Optimization Flags


Portability Flags


Compiler Flags


System and Other Tuning Information

Platform settings

One or more of the following settings may have been set.

Hardware Prefetch (Default = Enabled):

The NetBurst architecture introduced a hardware prefetch mechanism, which automatically prefetches data into the L2 cache in case of sequential data accesses with constant stride.

Adjacent Sector Prefetch (Default = Enabled):

The adjacent cache line prefetch feature, when enabled, will cause the CPU to fetch 2 adjacent cachelines when updating the cache rather than just a cacheline at a time.