|
          
            | JVM Instances | jvm_Ctr_1(1), jvm_Backend_1(4), jvm_TxInjector_1(4) | 
          
            | OS Image Description | os_1 | 
          
            | Tuning | OS tuning: dscrctl -n -s 1ulimit -n 100000vmo -o lgpg_size=16777216 -o lgpg_regions=59000MEMORY_AFFINITY=MCMLDR_CNTRL=LARGE_PAGE_DATA=Y@STACKPSIZE=16M@DATAPSIZE=16M@TEXTPSIZE=16M@SHMPSIZE=16M@NAMEDSHLIB64=rwbatch_16M_shlib,16M
 | 
          
            | Notes | None | 
              |
          
            | Parts of Benchmark | Controller | 
          
            | JVM Instance Description | jvm_1 | 
          
            | Command Line | -Xms3g -Xmx3g -Xgcthreads8 -Xnocompressedrefs -XtlhPrefetch -Xtrace:none | 
          
            | Tuning | None | 
          
            | Notes | None | 
              |
          
            | Parts of Benchmark | Backend | 
          
            | JVM Instance Description | jvm_1 | 
          
            | Command Line | -Xlp -Xms215040m -Xmx215040m -Xmn194560m -Xgcthreads48 -Xgc:scvtenureAge=2,scvNoAdaptiveTenure -Xnocompressedrefs -XtlhPrefetch -Dcom.ibm.crypto.provider.doAESInHardware=true -Dcom.ibm.enableClassCaching=true -Xconcurrentlevel0 -Xaggressive -Xcodecache32M -Xtrace:none | 
          
            | Tuning | execrset used to affinitize each Backend JVM to a single chip. execrset -c 0-47 for the first chipexecrset -c 48-95 for the second chipexecrset -c 96-143 for the third chipexecrset -c 144-191 for the fourth chip
 | 
          
            | Notes | None | 
              |
          
            | Parts of Benchmark | TxInjector | 
          
            | JVM Instance Description | jvm_1 | 
          
            | Command Line | -Xlp -Xms6g -Xmx6g -Xmn3g -Xgcthreads8 -Xgc:scvtenureAge=2,scvNoAdaptiveTenure -Xnocompressedrefs -Dcom.ibm.crypto.provider.doAESInHardware=true -XtlhPrefetch -Dcom.ibm.enableClassCaching=true -Xconcurrentlevel0 -Xaggressive -Xtrace:none | 
          
            | Tuning | execrset used to affinitize each TxInjector JVM to the first core of each chip. execrset -c 0-7 for the first core of the first chipexecrset -c 48-55 for the first core of the second chipexecrset -c 96-103 for the first core of the third chipexecrset -c 144-151 for the first core of the fourth chip
 | 
          
            | Notes | None |