|
Cisco Systems Cisco UCS C240 M5 (Intel Xeon Gold 6148 |
SPECrate2017_fp_base = 206 |
|
SPECrate2017_fp_peak = Not Run |
| CPU2017 License: | 9019 | Test Date: | Jan-2019 |
|---|---|---|---|
| Test Sponsor: | Cisco Systems | Hardware Availability: | Aug-2017 |
| Tested by: | Cisco Systems | Software Availability: | Nov-2018 |
Benchmark result graphs are available in the PDF report.
| Hardware | |
|---|---|
| CPU Name: | Intel Xeon Gold 6148 |
| Max MHz.: | 3700 |
| Nominal: | 2400 |
| Enabled: | 40 cores, 2 chips, 2 threads/core |
| Orderable: | 1,2 Chips |
| Cache L1: | 32 KB I + 32 KB D on chip per core |
| L2: | 1 MB I+D on chip per core |
| L3: | 27.5 MB I+D on chip per chip |
| Other: | None |
| Memory: | 768 GB (24 x 32 GB 2Rx4 PC4-2666V-R) |
| Storage: | 1 x 240 GB M.2 SATA SSD |
| Other: | None |
| Software | |
|---|---|
| OS: | SUSE Linux Enterprise Server 12 SP2 (x86_64) 4.4.120-92.70-default |
| Compiler: | C/C++: Version 19.0.1.144 of Intel C/C++ Compiler for Linux; Fortran: Version 19.0.1.144 of Intel Fortran Compiler for Linux |
| Parallel: | No |
| Firmware: | Version 4.0.1 released Oct-2018 |
| File System: | xfs |
| System State: | Run level 3 (multi-user) |
| Base Pointers: | 64-bit |
| Peak Pointers: | Not Applicable |
| Other: | None |
Results Table
| Benchmark | Base | Peak | ||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Copies | Seconds | Ratio | Seconds | Ratio | Seconds | Ratio | Copies | Seconds | Ratio | Seconds | Ratio | Seconds | Ratio | |
| SPECrate2017_fp_base | 206 | |||||||||||||
| SPECrate2017_fp_peak | Not Run | |||||||||||||
| Results appear in the order in which they were run. Bold underlined text indicates a median measurement. | ||||||||||||||
| 503.bwaves_r | 80 | 1737 | 462 | 1738 | 462 | 1739 | 461 | |||||||
| 507.cactuBSSN_r | 80 | 594 | 171 | 595 | 170 | 595 | 170 | |||||||
| 508.namd_r | 80 | 448 | 170 | 451 | 168 | 448 | 170 | |||||||
| 510.parest_r | 80 | 1934 | 108 | 1938 | 108 | 1941 | 108 | |||||||
| 511.povray_r | 80 | 734 | 255 | 732 | 255 | 731 | 256 | |||||||
| 519.lbm_r | 80 | 762 | 111 | 762 | 111 | 762 | 111 | |||||||
| 521.wrf_r | 80 | 864 | 207 | 863 | 208 | 867 | 207 | |||||||
| 526.blender_r | 80 | 526 | 232 | 528 | 231 | 527 | 231 | |||||||
| 527.cam4_r | 80 | 568 | 247 | 568 | 246 | 573 | 244 | |||||||
| 538.imagick_r | 80 | 386 | 516 | 383 | 519 | 385 | 516 | |||||||
| 544.nab_r | 80 | 357 | 378 | 356 | 378 | 357 | 377 | |||||||
| 549.fotonik3d_r | 80 | 2110 | 148 | 2109 | 148 | 2110 | 148 | |||||||
| 554.roms_r | 80 | 1420 | 89.5 | 1416 | 89.8 | 1416 | 89.8 | |||||||
Submit Notes
The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file.
Operating System Notes
Stack size set to unlimited using "ulimit -s unlimited"
General Notes
Environment variables set by runcpu before the start of the run: LD_LIBRARY_PATH = "/home/cpu2017/lib/ia32:/home/cpu2017/lib/intel64:/home/cpu2017/je5.0.1-32:/home/cpu2017/je5.0.1-64" Binaries compiled on a system with 1x Intel Core i7-4790 CPU + 32GB RAM memory using Redhat Enterprise Linux 7.4 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches runcpu command invoked through numactl i.e.: numactl --interleave=all runcpu <etc> Yes: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented.
Platform Notes
BIOS Settings:
Intel HyperThreading Technology set to Enabled
CPU performance set to Enterprise
Power Performance Tuning set to OS Controls
SNC set to Enabled
IMC Interleaving set to 1-way Interleave
Patrol Scrub set to Disabled
Sysinfo program /home/cpu2017/bin/sysinfo
Rev: r5974 of 2018-05-19 9bcde8f2999c33d61f64985e45859ea9
running on linux-x58q Thu Jan 17 23:04:33 2019
SUT (System Under Test) info as seen by some common utilities.
For more information on this section, see
https://www.spec.org/cpu2017/Docs/config.html#sysinfo
From /proc/cpuinfo
model name : Intel(R) Xeon(R) Gold 6148 CPU @ 2.40GHz
2 "physical id"s (chips)
80 "processors"
cores, siblings (Caution: counting these is hw and system dependent. The following
excerpts from /proc/cpuinfo might not be reliable. Use with caution.)
cpu cores : 20
siblings : 40
physical 0: cores 0 1 2 3 4 8 9 10 11 12 16 17 18 19 20 24 25 26 27 28
physical 1: cores 0 1 2 3 4 8 9 10 11 12 16 17 18 19 20 24 25 26 27 28
From lscpu:
Architecture: x86_64
CPU op-mode(s): 32-bit, 64-bit
Byte Order: Little Endian
CPU(s): 80
On-line CPU(s) list: 0-79
Thread(s) per core: 2
Core(s) per socket: 20
Socket(s): 2
NUMA node(s): 4
Vendor ID: GenuineIntel
CPU family: 6
Model: 85
Model name: Intel(R) Xeon(R) Gold 6148 CPU @ 2.40GHz
Stepping: 4
CPU MHz: 3094.578
CPU max MHz: 3700.0000
CPU min MHz: 1000.0000
BogoMIPS: 4788.72
Virtualization: VT-x
L1d cache: 32K
L1i cache: 32K
L2 cache: 1024K
L3 cache: 28160K
NUMA node0 CPU(s): 0-2,5,6,10-12,15,16,40-42,45,46,50-52,55,56
NUMA node1 CPU(s): 3,4,7-9,13,14,17-19,43,44,47-49,53,54,57-59
NUMA node2 CPU(s): 20-22,25,26,30-32,35,36,60-62,65,66,70-72,75,76
NUMA node3 CPU(s): 23,24,27-29,33,34,37-39,63,64,67-69,73,74,77-79
Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp
lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc
aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg
fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes
xsave avx f16c rdrand lahf_lm abm 3dnowprefetch ida arat epb invpcid_single pln pts
dtherm hwp hwp_act_window hwp_epp hwp_pkg_req intel_pt rsb_ctxsw spec_ctrl stibp
retpoline kaiser tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle
avx2 smep bmi2 erms invpcid rtm cqm mpx avx512f avx512dq rdseed adx smap clflushopt
clwb avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 cqm_llc cqm_occup_llc
/proc/cpuinfo cache data
cache size : 28160 KB
From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a
physical chip.
available: 4 nodes (0-3)
node 0 cpus: 0 1 2 5 6 10 11 12 15 16 40 41 42 45 46 50 51 52 55 56
node 0 size: 192097 MB
node 0 free: 191837 MB
node 1 cpus: 3 4 7 8 9 13 14 17 18 19 43 44 47 48 49 53 54 57 58 59
node 1 size: 193528 MB
node 1 free: 193163 MB
node 2 cpus: 20 21 22 25 26 30 31 32 35 36 60 61 62 65 66 70 71 72 75 76
node 2 size: 193528 MB
node 2 free: 193294 MB
node 3 cpus: 23 24 27 28 29 33 34 37 38 39 63 64 67 68 69 73 74 77 78 79
node 3 size: 193525 MB
node 3 free: 193290 MB
node distances:
node 0 1 2 3
0: 10 11 21 21
1: 11 10 21 21
2: 21 21 10 11
3: 21 21 11 10
From /proc/meminfo
MemTotal: 791224448 kB
HugePages_Total: 0
Hugepagesize: 2048 kB
From /etc/*release* /etc/*version*
SuSE-release:
SUSE Linux Enterprise Server 12 (x86_64)
VERSION = 12
PATCHLEVEL = 2
# This file is deprecated and will be removed in a future service pack or release.
# Please check /etc/os-release for details about this release.
os-release:
NAME="SLES"
VERSION="12-SP2"
VERSION_ID="12.2"
PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2"
ID="sles"
ANSI_COLOR="0;32"
CPE_NAME="cpe:/o:suse:sles:12:sp2"
uname -a:
Linux linux-x58q 4.4.120-92.70-default #1 SMP Wed Mar 14 15:59:43 UTC 2018 (52a83de)
x86_64 x86_64 x86_64 GNU/Linux
Kernel self-reported vulnerability status:
CVE-2017-5754 (Meltdown): Mitigation: PTI
CVE-2017-5753 (Spectre variant 1): Mitigation: __user pointer sanitization
CVE-2017-5715 (Spectre variant 2): Mitigation: IBRS+IBPB
run-level 3 Jan 17 23:03
SPEC is set to: /home/cpu2017
Filesystem Type Size Used Avail Use% Mounted on
/dev/sda2 xfs 210G 28G 183G 13% /
Additional information from dmidecode follows. WARNING: Use caution when you interpret
this section. The 'dmidecode' program reads system data which is "intended to allow
hardware to be accurately determined", but the intent may not be met, as there are
frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard.
BIOS Cisco Systems, Inc. C240M5.4.0.1.139.1003182220 10/03/2018
Memory:
24x 0xCE00 M393A4K40BB2-CTD 32 GB 2 rank 2666
(End of data from sysinfo program)
Compiler Version Notes
============================================================================== CC 519.lbm_r(base) 538.imagick_r(base) 544.nab_r(base) ------------------------------------------------------------------------------ icc (ICC) 19.0.1.144 20181018 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CXXC 508.namd_r(base) 510.parest_r(base) ------------------------------------------------------------------------------ icpc (ICC) 19.0.1.144 20181018 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CC 511.povray_r(base) 526.blender_r(base) ------------------------------------------------------------------------------ icpc (ICC) 19.0.1.144 20181018 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. icc (ICC) 19.0.1.144 20181018 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== FC 507.cactuBSSN_r(base) ------------------------------------------------------------------------------ icpc (ICC) 19.0.1.144 20181018 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. icc (ICC) 19.0.1.144 20181018 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ifort (IFORT) 19.0.1.144 20181018 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== FC 503.bwaves_r(base) 549.fotonik3d_r(base) 554.roms_r(base) ------------------------------------------------------------------------------ ifort (IFORT) 19.0.1.144 20181018 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CC 521.wrf_r(base) 527.cam4_r(base) ------------------------------------------------------------------------------ ifort (IFORT) 19.0.1.144 20181018 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. icc (ICC) 19.0.1.144 20181018 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------
Base Compiler Invocation
C benchmarks:
| icc -m64 -std=c11 |
C++ benchmarks:
| icpc -m64 |
Fortran benchmarks:
| ifort -m64 |
Benchmarks using both Fortran and C:
| ifort -m64 icc -m64 -std=c11 |
Benchmarks using both C and C++:
| icpc -m64 icc -m64 -std=c11 |
Benchmarks using Fortran, C, and C++:
| icpc -m64 icc -m64 -std=c11 ifort -m64 |
Base Portability Flags
| 503.bwaves_r: | -DSPEC_LP64 |
| 507.cactuBSSN_r: | -DSPEC_LP64 |
| 508.namd_r: | -DSPEC_LP64 |
| 510.parest_r: | -DSPEC_LP64 |
| 511.povray_r: | -DSPEC_LP64 |
| 519.lbm_r: | -DSPEC_LP64 |
| 521.wrf_r: | -DSPEC_LP64 -DSPEC_CASE_FLAG -convert big_endian |
| 526.blender_r: | -DSPEC_LP64 -DSPEC_LINUX -funsigned-char |
| 527.cam4_r: | -DSPEC_LP64 -DSPEC_CASE_FLAG |
| 538.imagick_r: | -DSPEC_LP64 |
| 544.nab_r: | -DSPEC_LP64 |
| 549.fotonik3d_r: | -DSPEC_LP64 |
| 554.roms_r: | -DSPEC_LP64 |
Base Optimization Flags
C benchmarks:
| -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 |
C++ benchmarks:
| -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 |
Fortran benchmarks:
| -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte |
Benchmarks using both Fortran and C:
| -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte |
Benchmarks using both C and C++:
| -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 |
Benchmarks using Fortran, C, and C++:
| -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte |