SPEC(R) CPU2017 Integer Rate Result Acer Incorporated Altos R380 F4 (Intel Xeon Silver 4110) CPU2017 License: 97 Test date: Sep-2018 Test sponsor: Acer Incorporated Hardware availability: Oct-2017 Tested by: Acer Incorporated Software availability: Mar-2018 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate --------------- ------- --------- --------- ------- --------- --------- 500.perlbench_r 32 923 55.2 * 500.perlbench_r 32 921 55.3 S 500.perlbench_r 32 928 54.9 S 502.gcc_r 32 709 63.9 S 502.gcc_r 32 706 64.2 S 502.gcc_r 32 706 64.2 * 505.mcf_r 32 568 91.0 S 505.mcf_r 32 556 93.0 S 505.mcf_r 32 565 91.5 * 520.omnetpp_r 32 854 49.2 S 520.omnetpp_r 32 854 49.2 * 520.omnetpp_r 32 856 49.0 S 523.xalancbmk_r 32 447 75.7 S 523.xalancbmk_r 32 446 75.8 * 523.xalancbmk_r 32 445 76.0 S 525.x264_r 32 405 139 S 525.x264_r 32 397 141 S 525.x264_r 32 403 139 * 531.deepsjeng_r 32 579 63.3 S 531.deepsjeng_r 32 577 63.5 S 531.deepsjeng_r 32 579 63.4 * 541.leela_r 32 923 57.4 S 541.leela_r 32 915 57.9 * 541.leela_r 32 913 58.0 S 548.exchange2_r 32 618 136 S 548.exchange2_r 32 617 136 S 548.exchange2_r 32 618 136 * 557.xz_r 32 638 54.2 S 557.xz_r 32 638 54.2 * 557.xz_r 32 638 54.1 S ================================================================================= 500.perlbench_r 32 923 55.2 * 502.gcc_r 32 706 64.2 * 505.mcf_r 32 565 91.5 * 520.omnetpp_r 32 854 49.2 * 523.xalancbmk_r 32 446 75.8 * 525.x264_r 32 403 139 * 531.deepsjeng_r 32 579 63.4 * 541.leela_r 32 915 57.9 * 548.exchange2_r 32 618 136 * 557.xz_r 32 638 54.2 * SPECrate2017_int_base 73.4 SPECrate2017_int_peak Not Run HARDWARE -------- CPU Name: Intel Xeon Silver 4110 Max MHz.: 3000 Nominal: 2100 Enabled: 16 cores, 2 chips, 2 threads/core Orderable: 1,2 chips Cache L1: 32 KB I + 32 KB D on chip per core L2: 1 MB I+D on chip per core L3: 11 MB I+D on chip per chip Other: None Memory: 768 GB (24 x 32 GB 2Rx4 PC4-2666V-R, running at 2400) Storage: 1 x 1000 GB SATA, 7200 RPM Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Server 12 SP3 (x86_64) 4.4.120-94.17-default Compiler: C/C++: Version 18.0.2.199 of Intel C/C++ Compiler for Linux; Fortran: Version 18.0.2.199 of Intel Fortran Compiler for Linux Parallel: No Firmware: Version 00.01.0013 released Mar-2018 File System: xfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: Not Applicable Other: jemalloc memory allocator V5.0.1 Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" General Notes ------------- Environment variables set by runcpu before the start of the run: LD_LIBRARY_PATH = "/home/speccpu/cpu2017/lib/ia32:/home/speccpu/cpu2017/lib/intel64:/home/speccpu/cpu2017/je5.0.1-32: /home/speccpu/cpu2017/je5.0.1-64" Binaries compiled on a system with 1x Intel Core i7-6700K CPU + 32GB RAM memory using Redhat Enterprise Linux 7.5 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches runcpu command invoked through numactl i.e.: numactl --interleave=all runcpu Yes: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. jemalloc, a general purpose malloc implementation built with the RedHat Enterprise 7.5, and the system compiler gcc 4.8.5 sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases Platform Notes -------------- BIOS Configuration: CPU Power and Performance Policy set to Performance IMC set to 1-way interleaving Sub_NUMA Cluster set to enabled Set Fan Profile set to Performance Sysinfo program /home/speccpu/cpu2017/bin/sysinfo Rev: r5974 of 2018-05-19 9bcde8f2999c33d61f64985e45859ea9 running on linux-65s1 Wed Sep 19 10:53:14 2018 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Silver 4110 CPU @ 2.10GHz 2 "physical id"s (chips) 32 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 8 siblings : 16 physical 0: cores 0 1 2 3 4 5 6 7 physical 1: cores 0 1 2 3 4 5 6 7 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 32 On-line CPU(s) list: 0-31 Thread(s) per core: 2 Core(s) per socket: 8 Socket(s): 2 NUMA node(s): 2 Vendor ID: GenuineIntel CPU family: 6 Model: 85 Model name: Intel(R) Xeon(R) Silver 4110 CPU @ 2.10GHz Stepping: 4 CPU MHz: 1016.966 CPU max MHz: 3000.0000 CPU min MHz: 800.0000 BogoMIPS: 4190.19 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 1024K L3 cache: 11264K NUMA node0 CPU(s): 0-7,16-23 NUMA node1 CPU(s): 8-15,24-31 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch ida arat epb invpcid_single pln pts dtherm hwp hwp_act_window hwp_epp hwp_pkg_req intel_pt rsb_ctxsw spec_ctrl stibp retpoline kaiser tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx avx512f avx512dq rdseed adx smap clflushopt clwb avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 cqm_llc cqm_occup_llc pku ospke /proc/cpuinfo cache data cache size : 11264 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 2 nodes (0-1) node 0 cpus: 0 1 2 3 4 5 6 7 16 17 18 19 20 21 22 23 node 0 size: 385604 MB node 0 free: 384944 MB node 1 cpus: 8 9 10 11 12 13 14 15 24 25 26 27 28 29 30 31 node 1 size: 386923 MB node 1 free: 386414 MB node distances: node 0 1 0: 10 21 1: 21 10 From /proc/meminfo MemTotal: 791068792 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 3 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP3" VERSION_ID="12.3" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP3" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp3" uname -a: Linux linux-65s1 4.4.120-94.17-default #1 SMP Wed Mar 14 17:23:00 UTC 2018 (cf3a7bb) x86_64 x86_64 x86_64 GNU/Linux Kernel self-reported vulnerability status: CVE-2017-5754 (Meltdown): Mitigation: PTI CVE-2017-5753 (Spectre variant 1): Mitigation: __user pointer sanitization CVE-2017-5715 (Spectre variant 2): Mitigation: IBRS+IBPB run-level 3 Sep 19 10:36 SPEC is set to: /home/speccpu/cpu2017 Filesystem Type Size Used Avail Use% Mounted on /dev/sda3 xfs 929G 269G 661G 29% / Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS Intel Corporation SE5C620.86B.00.01.0013.030920180427 03/09/2018 Memory: 24x Samsung M393A4K40BB2-CTD 32 GB 2 rank 2666, configured at 2400 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== CC 500.perlbench_r(base) 502.gcc_r(base) 505.mcf_r(base) 525.x264_r(base) 557.xz_r(base) ------------------------------------------------------------------------------ icc (ICC) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CXXC 520.omnetpp_r(base) 523.xalancbmk_r(base) 531.deepsjeng_r(base) 541.leela_r(base) ------------------------------------------------------------------------------ icpc (ICC) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== FC 548.exchange2_r(base) ------------------------------------------------------------------------------ ifort (IFORT) 18.0.2 20180210 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icc -m64 -std=c11 C++ benchmarks: icpc -m64 Fortran benchmarks: ifort -m64 Base Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -DSPEC_LP64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -DSPEC_LP64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc C++ benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc Fortran benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -L/usr/local/je5.0.1-64/lib -ljemalloc The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Acer-Platform-Settings-V1.3-revC.html http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2017-12-21.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Acer-Platform-Settings-V1.3-revC.xml http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2017-12-21.xml SPEC is a registered trademark of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2018 Standard Performance Evaluation Corporation Tested with SPEC CPU2017 v1.0.5 on 2018-09-18 22:53:14-0400. Report generated on 2018-10-31 19:03:09 by CPU2017 ASCII formatter v6067. Originally published on 2018-10-16.