SPEC(R) CPU2017 Integer Speed Result Lenovo Global Technology ThinkSystem SR650 (2.20 GHz, Intel Xeon Gold 5120) CPU2017 License: 9017 Test date: Dec-2017 Test sponsor: Lenovo Global Technology Hardware availability: Aug-2017 Tested by: Lenovo Global Technology Software availability: Sep-2017 Base Base Base Peak Peak Peak Benchmarks Threads Run Time Ratio Threads Run Time Ratio --------------- ------- --------- --------- ------- --------- --------- 600.perlbench_s 28 331 5.36 * 28 275 6.45 S 600.perlbench_s 28 330 5.39 S 28 277 6.41 * 600.perlbench_s 28 333 5.33 S 28 279 6.37 S 602.gcc_s 28 491 8.11 S 28 475 8.39 S 602.gcc_s 28 489 8.15 S 28 477 8.34 S 602.gcc_s 28 490 8.12 * 28 476 8.37 * 605.mcf_s 28 483 9.77 * 28 478 9.88 S 605.mcf_s 28 483 9.78 S 28 482 9.80 * 605.mcf_s 28 487 9.69 S 28 486 9.71 S 620.omnetpp_s 28 329 4.96 * 28 322 5.07 S 620.omnetpp_s 28 326 5.01 S 28 309 5.29 S 620.omnetpp_s 28 329 4.95 S 28 309 5.29 * 623.xalancbmk_s 28 173 8.21 * 28 160 8.83 S 623.xalancbmk_s 28 172 8.23 S 28 161 8.81 S 623.xalancbmk_s 28 173 8.18 S 28 161 8.81 * 625.x264_s 28 174 10.1 S 28 174 10.1 S 625.x264_s 28 174 10.2 S 28 174 10.1 * 625.x264_s 28 174 10.1 * 28 174 10.1 S 631.deepsjeng_s 28 320 4.47 S 28 322 4.45 * 631.deepsjeng_s 28 320 4.48 S 28 322 4.45 S 631.deepsjeng_s 28 320 4.48 * 28 322 4.44 S 641.leela_s 28 455 3.75 * 28 453 3.76 S 641.leela_s 28 455 3.75 S 28 454 3.76 * 641.leela_s 28 455 3.75 S 28 454 3.76 S 648.exchange2_s 28 254 11.6 S 28 255 11.5 S 648.exchange2_s 28 254 11.6 * 28 254 11.6 S 648.exchange2_s 28 255 11.5 S 28 254 11.6 * 657.xz_s 28 326 19.0 S 28 326 19.0 S 657.xz_s 28 326 19.0 * 28 327 18.9 S 657.xz_s 28 328 18.8 S 28 326 18.9 * ================================================================================= 600.perlbench_s 28 331 5.36 * 28 277 6.41 * 602.gcc_s 28 490 8.12 * 28 476 8.37 * 605.mcf_s 28 483 9.77 * 28 482 9.80 * 620.omnetpp_s 28 329 4.96 * 28 309 5.29 * 623.xalancbmk_s 28 173 8.21 * 28 161 8.81 * 625.x264_s 28 174 10.1 * 28 174 10.1 * 631.deepsjeng_s 28 320 4.48 * 28 322 4.45 * 641.leela_s 28 455 3.75 * 28 454 3.76 * 648.exchange2_s 28 254 11.6 * 28 254 11.6 * 657.xz_s 28 326 19.0 * 28 326 18.9 * SPECspeed2017_int_base 7.61 SPECspeed2017_int_peak 7.87 HARDWARE -------- CPU Name: Intel Xeon Gold 5120 Max MHz.: 3200 Nominal: 2200 Enabled: 28 cores, 2 chips Orderable: 1,2 chips Cache L1: 32 KB I + 32 KB D on chip per core L2: 1 MB I+D on chip per core L3: 19.25 MB I+D on chip per chip Other: None Memory: 384 GB (24 x 16 GB 2Rx8 PC4-2666V-R, running at 2400) Storage: 1 x 800 GB SAS SSD Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Server 12 SP2 (x86_64) Kernel 4.4.21-69-default Compiler: C/C++: Version 18.0.0.128 of Intel C/C++ Compiler for Linux; Fortran: Version 18.0.0.128 of Intel Fortran Compiler for Linux Parallel: Yes Firmware: Lenovo BIOS Version IVE111C 1.00 released Jul-2017 File System: btrfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 32/64-bit Other: jemalloc: jemalloc memory allocator library V5.0.1; jemalloc: configured and built at default for 32bit (i686) and 64bit (x86_64) targets; jemalloc: built with the RedHat Enterprise 7.4, and the system compiler gcc 4.8.5; jemalloc: sources avilable from jemalloc.net or https://github.com/jemalloc/jemalloc/releases Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" General Notes ------------- Environment variables set by runcpu before the start of the run: KMP_AFFINITY = "granularity=fine,scatter" LD_LIBRARY_PATH = "/home/cpu2017.1.0.2.ic18.0/lib/ia32:/home/cpu2017.1.0.2.ic18.0/lib/intel64" LD_LIBRARY_PATH = "$LD_LIBRARY_PATH:/home/cpu2017.1.0.2.ic18.0/je5.0.1-32:/home/cpu2017.1.0.2.ic18.0/je5.0.1-64" Binaries compiled on a system with 1x Intel Core i7-4790 CPU + 32GB RAM memory using Redhat Enterprise Linux 7.4 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches Platform Notes -------------- BIOS configuration: Choose Operating Mode set to Maximum Performance Hyper-Threading set to Disable MONITORMWAIT set to Enable Adjacent Cache Prefetch set to Disable XPT Prefetcher set to Enable Stale AtoS set to Enable DCA set to Enable Sysinfo program /home/cpu2017.1.0.2.ic18.0/bin/sysinfo Rev: r5797 of 2017-06-14 96c45e4568ad54c135fd618bcc091c0f running on Cyborg-SPECcpu2006-SUSE12SP2 Tue Dec 5 22:21:49 2017 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Gold 5120 CPU @ 2.20GHz 2 "physical id"s (chips) 28 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 14 siblings : 14 physical 0: cores 0 1 2 3 4 5 6 8 9 10 11 12 13 14 physical 1: cores 0 1 2 3 4 5 6 8 9 10 11 12 13 14 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 28 On-line CPU(s) list: 0-27 Thread(s) per core: 1 Core(s) per socket: 14 Socket(s): 2 NUMA node(s): 2 Vendor ID: GenuineIntel CPU family: 6 Model: 85 Model name: Intel(R) Xeon(R) Gold 5120 CPU @ 2.20GHz Stepping: 4 CPU MHz: 2194.849 BogoMIPS: 4389.69 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 1024K L3 cache: 19712K NUMA node0 CPU(s): 0-13 NUMA node1 CPU(s): 14-27 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch ida arat epb pln pts dtherm intel_pt tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx avx512f avx512dq rdseed adx smap clflushopt clwb avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 cqm_llc cqm_occup_llc /proc/cpuinfo cache data cache size : 19712 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 2 nodes (0-1) node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 node 0 size: 193110 MB node 0 free: 192325 MB node 1 cpus: 14 15 16 17 18 19 20 21 22 23 24 25 26 27 node 1 size: 193504 MB node 1 free: 192758 MB node distances: node 0 1 0: 10 21 1: 21 10 From /proc/meminfo MemTotal: 395893940 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 2 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP2" VERSION_ID="12.2" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp2" uname -a: Linux Cyborg-SPECcpu2006-SUSE12SP2 4.4.21-69-default #1 SMP Tue Oct 25 10:58:20 UTC 2016 (9464f67) x86_64 x86_64 x86_64 GNU/Linux run-level 3 Dec 5 22:20 SPEC is set to: /home/cpu2017.1.0.2.ic18.0 Filesystem Type Size Used Avail Use% Mounted on /dev/sdb2 btrfs 744G 174G 569G 24% /home Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS Lenovo -[IVE111C-1.00]- 07/17/2017 Memory: 24x Samsung M393A2K43BB1-CTD 16 GB 2 rank 2666, configured at 2400 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== CC 600.perlbench_s(base) 602.gcc_s(base) 605.mcf_s(base) 625.x264_s(base, peak) 657.xz_s(base) ------------------------------------------------------------------------------ icc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CC 600.perlbench_s(peak) 602.gcc_s(peak) 605.mcf_s(peak) 657.xz_s(peak) ------------------------------------------------------------------------------ icc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CXXC 620.omnetpp_s(base) 623.xalancbmk_s(base) 631.deepsjeng_s(base) 641.leela_s(base) ------------------------------------------------------------------------------ icpc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CXXC 620.omnetpp_s(peak) 623.xalancbmk_s(peak) 631.deepsjeng_s(peak) 641.leela_s(peak) ------------------------------------------------------------------------------ icpc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== FC 648.exchange2_s(base, peak) ------------------------------------------------------------------------------ ifort (IFORT) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icc C++ benchmarks: icpc Fortran benchmarks: ifort Base Portability Flags ---------------------- 600.perlbench_s: -DSPEC_LP64 -DSPEC_LINUX_X64 602.gcc_s: -DSPEC_LP64 605.mcf_s: -DSPEC_LP64 620.omnetpp_s: -DSPEC_LP64 623.xalancbmk_s: -DSPEC_LP64 -DSPEC_LINUX 625.x264_s: -DSPEC_LP64 631.deepsjeng_s: -DSPEC_LP64 641.leela_s: -DSPEC_LP64 648.exchange2_s: -DSPEC_LP64 657.xz_s: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -qopenmp -DSPEC_OPENMP -L/usr/local/je5.0.1-64/lib -ljemalloc C++ benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc Fortran benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte -L/usr/local/je5.0.1-64/lib -ljemalloc Base Other Flags ---------------- C benchmarks: -m64 -std=c11 C++ benchmarks: -m64 Fortran benchmarks: -m64 Peak Compiler Invocation ------------------------ C benchmarks: icc C++ benchmarks: icpc Fortran benchmarks: ifort Peak Portability Flags ---------------------- 600.perlbench_s: -DSPEC_LP64 -DSPEC_LINUX_X64 602.gcc_s: -DSPEC_LP64 605.mcf_s: -DSPEC_LP64 620.omnetpp_s: -DSPEC_LP64 623.xalancbmk_s: -D_FILE_OFFSET_BITS=64 -DSPEC_LINUX 625.x264_s: -DSPEC_LP64 631.deepsjeng_s: -DSPEC_LP64 641.leela_s: -DSPEC_LP64 648.exchange2_s: -DSPEC_LP64 657.xz_s: -DSPEC_LP64 Peak Optimization Flags ----------------------- C benchmarks: 600.perlbench_s: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -O2 -xCORE-AVX512 -qopt-mem-layout-trans=3 -ipo -O3 -no-prec-div -DSPEC_SUPPRESS_OPENMP -qopenmp -DSPEC_OPENMP -fno-strict-overflow -L/usr/local/je5.0.1-64/lib -ljemalloc 602.gcc_s: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -O2 -xCORE-AVX512 -qopt-mem-layout-trans=3 -ipo -O3 -no-prec-div -DSPEC_SUPPRESS_OPENMP -qopenmp -DSPEC_OPENMP -L/usr/local/je5.0.1-64/lib -ljemalloc 605.mcf_s: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -DSPEC_SUPPRESS_OPENMP -qopenmp -DSPEC_OPENMP -L/usr/local/je5.0.1-64/lib -ljemalloc 625.x264_s: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -qopenmp -DSPEC_OPENMP -L/usr/local/je5.0.1-64/lib -ljemalloc 657.xz_s: Same as 602.gcc_s C++ benchmarks: 620.omnetpp_s: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -DSPEC_SUPPRESS_OPENMP -qopenmp -DSPEC_OPENMP -L/usr/local/je5.0.1-64/lib -ljemalloc 623.xalancbmk_s: -L/opt/intel/compilers_and_libraries_2018/linux/lib/ia32 -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -DSPEC_SUPPRESS_OPENMP -qopenmp -DSPEC_OPENMP -L/usr/local/je5.0.1-32/lib -ljemalloc 631.deepsjeng_s: Same as 620.omnetpp_s 641.leela_s: Same as 620.omnetpp_s Fortran benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte -L/usr/local/je5.0.1-64/lib -ljemalloc Peak Other Flags ---------------- C benchmarks: -m64 -std=c11 C++ benchmarks (except as noted below): -m64 623.xalancbmk_s: -m32 Fortran benchmarks: -m64 The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.html http://www.spec.org/cpu2017/flags/Lenovo-Platform-SPECcpu2017-Flags-V1.2-SKL-A.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.xml http://www.spec.org/cpu2017/flags/Lenovo-Platform-SPECcpu2017-Flags-V1.2-SKL-A.xml SPEC is a registered trademark of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. -------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2018 Standard Performance Evaluation Corporation Tested with SPEC CPU2017 v1.0.2 on 2017-12-05 09:21:48-0500. Report generated on 2018-10-31 13:22:06 by CPU2017 ASCII formatter v6067. Originally published on 2017-12-26.