SPEC CPU(R)2017 Integer Speed Result Cisco Systems Cisco UCS B480 M5 (Intel Xeon Gold 6146, 3.20 GHz) CPU2017 License: 9019 Test date: Nov-2017 Test sponsor: Cisco Systems Hardware availability: Aug-2017 Tested by: Cisco Systems Software availability: Sep-2017 Base Base Base Peak Peak Peak Benchmarks Threads Run Time Ratio Threads Run Time Ratio --------------- ------- --------- --------- ------- --------- --------- 600.perlbench_s 48 255 6.96 S 48 214 8.31 * 600.perlbench_s 48 253 7.01 S 48 213 8.31 S 600.perlbench_s 48 255 6.96 * 48 214 8.30 S 602.gcc_s 48 384 10.4 S 48 369 10.8 S 602.gcc_s 48 380 10.5 * 48 374 10.6 S 602.gcc_s 48 380 10.5 S 48 371 10.7 * 605.mcf_s 48 384 12.3 S 48 381 12.4 S 605.mcf_s 48 389 12.1 S 48 387 12.2 S 605.mcf_s 48 384 12.3 * 48 382 12.4 * 620.omnetpp_s 48 235 6.94 S 48 241 6.78 * 620.omnetpp_s 48 233 7.01 * 48 245 6.66 S 620.omnetpp_s 48 231 7.06 S 48 227 7.19 S 623.xalancbmk_s 48 134 10.5 S 48 124 11.5 S 623.xalancbmk_s 48 133 10.6 * 48 124 11.4 * 623.xalancbmk_s 48 132 10.7 S 48 127 11.2 S 625.x264_s 48 135 13.1 * 48 135 13.1 S 625.x264_s 48 135 13.1 S 48 135 13.1 * 625.x264_s 48 135 13.1 S 48 135 13.1 S 631.deepsjeng_s 48 253 5.66 S 48 254 5.65 S 631.deepsjeng_s 48 253 5.67 S 48 254 5.64 S 631.deepsjeng_s 48 253 5.67 * 48 254 5.64 * 641.leela_s 48 346 4.93 S 48 345 4.95 * 641.leela_s 48 346 4.92 S 48 345 4.95 S 641.leela_s 48 346 4.93 * 48 345 4.95 S 648.exchange2_s 48 193 15.2 * 48 193 15.3 S 648.exchange2_s 48 193 15.2 S 48 193 15.2 * 648.exchange2_s 48 193 15.2 S 48 194 15.1 S 657.xz_s 48 238 26.0 S 48 240 25.7 S 657.xz_s 48 241 25.6 S 48 237 26.1 S 657.xz_s 48 241 25.7 * 48 240 25.7 * ================================================================================= 600.perlbench_s 48 255 6.96 * 48 214 8.31 * 602.gcc_s 48 380 10.5 * 48 371 10.7 * 605.mcf_s 48 384 12.3 * 48 382 12.4 * 620.omnetpp_s 48 233 7.01 * 48 241 6.78 * 623.xalancbmk_s 48 133 10.6 * 48 124 11.4 * 625.x264_s 48 135 13.1 * 48 135 13.1 * 631.deepsjeng_s 48 253 5.67 * 48 254 5.64 * 641.leela_s 48 346 4.93 * 48 345 4.95 * 648.exchange2_s 48 193 15.2 * 48 193 15.2 * 657.xz_s 48 241 25.7 * 48 240 25.7 * SPECspeed(R)2017_int_base 9.95 SPECspeed(R)2017_int_peak 10.2 HARDWARE -------- CPU Name: Intel Xeon Gold 6146 Max MHz: 4200 Nominal: 3200 Enabled: 48 cores, 4 chips Orderable: 2,4 Chips Cache L1: 32 KB I + 32 KB D on chip per core L2: 1 MB I+D on chip per core L3: 24.75 MB I+D on chip per chip Other: None Memory: 768 GB (48 x 16 GB 2Rx4 PC4-2666V-R) Storage: 1 x 600 GB SAS HDD, 10K RPM Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Server 12 SP2 (x86_64) 4.4.21-69-default Compiler: C/C++: Version 18.0.0.128 of Intel C/C++ Compiler for Linux; Fortran: Version 18.0.0.128 of Intel Fortran Compiler for Linux Parallel: Yes Firmware: Version 3.2.2a released Sep-2017 File System: xfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 32/64-bit Other: jemalloc: jemalloc memory allocator library V5.0.1; jemalloc: configured and built at default for 32bit (i686) and 64bit (x86_64) targets Power Management: -- Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" General Notes ------------- Environment variables set by runcpu before the start of the run: KMP_AFFINITY = "granularity=fine,scatter" LD_LIBRARY_PATH = "/opt/cpu2017/lib/ia32:/opt/cpu2017/lib/intel64:/opt/cpu2017/je5.0.1-32:/opt/cpu2017/je5.0.1-64" OMP_STACKSIZE = "192M" Binaries compiled on a system with 1x Intel Core i7-4790 CPU + 32GB RAM memory using Redhat Enterprise Linux 7.4 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches jemalloc, a general purpose malloc implementation built with the RedHat Enterprise 7.4, and the system compiler gcc 4.8.5 sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases Platform Notes -------------- BIOS Settings: Intel HyperThreading Technology set to Disabled CPU performance set to Enterprise Power Performance Tuning set to OS SNC set to Disabled IMC Interleaving set to Auto Patrol Scrub set to Disabled Sysinfo program /opt/cpu2017/bin/sysinfo Rev: r5797 of 2017-06-14 96c45e4568ad54c135fd618bcc091c0f running on linux-vb5q Tue Jan 5 09:38:48 2010 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Gold 6146 CPU @ 3.20GHz 4 "physical id"s (chips) 48 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 12 siblings : 12 physical 0: cores 0 3 4 5 6 7 16 18 19 20 21 22 physical 1: cores 0 3 4 5 6 7 16 18 19 20 21 22 physical 2: cores 0 1 3 9 10 16 18 19 24 25 26 27 physical 3: cores 0 1 3 9 10 16 18 19 24 25 26 27 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 48 On-line CPU(s) list: 0-47 Thread(s) per core: 1 Core(s) per socket: 12 Socket(s): 4 NUMA node(s): 4 Vendor ID: GenuineIntel CPU family: 6 Model: 85 Model name: Intel(R) Xeon(R) Gold 6146 CPU @ 3.20GHz Stepping: 4 CPU MHz: 1473.750 CPU max MHz: 4200.0000 CPU min MHz: 1200.0000 BogoMIPS: 6400.04 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 1024K L3 cache: 25344K NUMA node0 CPU(s): 0-11 NUMA node1 CPU(s): 12-23 NUMA node2 CPU(s): 24-35 NUMA node3 CPU(s): 36-47 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch ida arat epb pln pts dtherm hwp hwp_act_window hwp_epp hwp_pkg_req intel_pt tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx avx512f avx512dq rdseed adx smap clflushopt clwb avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 cqm_llc cqm_occup_llc /proc/cpuinfo cache data cache size : 25344 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 4 nodes (0-3) node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 node 0 size: 191928 MB node 0 free: 191259 MB node 1 cpus: 12 13 14 15 16 17 18 19 20 21 22 23 node 1 size: 193521 MB node 1 free: 192972 MB node 2 cpus: 24 25 26 27 28 29 30 31 32 33 34 35 node 2 size: 193521 MB node 2 free: 192994 MB node 3 cpus: 36 37 38 39 40 41 42 43 44 45 46 47 node 3 size: 193518 MB node 3 free: 193036 MB node distances: node 0 1 2 3 0: 10 21 21 21 1: 21 10 21 21 2: 21 21 10 21 3: 21 21 21 10 From /proc/meminfo MemTotal: 791029124 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 2 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP2" VERSION_ID="12.2" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp2" uname -a: Linux linux-vb5q 4.4.21-69-default #1 SMP Tue Oct 25 10:58:20 UTC 2016 (9464f67) x86_64 x86_64 x86_64 GNU/Linux run-level 3 Jan 4 23:04 SPEC is set to: /opt/cpu2017 Filesystem Type Size Used Avail Use% Mounted on /dev/sda1 xfs 280G 108G 172G 39% / Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS Cisco Systems, Inc. B480M5.3.2.2a.0.0919171641 09/19/2017 Memory: 48x 0xCE00 M393A2G40EB2-CTD 16 GB 2 rank 2666 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== C | 600.perlbench_s(base, peak) 602.gcc_s(base, peak) 605.mcf_s(base, | peak) 625.x264_s(base, peak) 657.xz_s(base, peak) ------------------------------------------------------------------------------ icc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 620.omnetpp_s(base, peak) 623.xalancbmk_s(base, peak) | 631.deepsjeng_s(base, peak) 641.leela_s(base, peak) ------------------------------------------------------------------------------ icpc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran | 648.exchange2_s(base, peak) ------------------------------------------------------------------------------ ifort (IFORT) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icc C++ benchmarks: icpc Fortran benchmarks: ifort Base Portability Flags ---------------------- 600.perlbench_s: -DSPEC_LP64 -DSPEC_LINUX_X64 602.gcc_s: -DSPEC_LP64 605.mcf_s: -DSPEC_LP64 620.omnetpp_s: -DSPEC_LP64 623.xalancbmk_s: -DSPEC_LP64 -DSPEC_LINUX 625.x264_s: -DSPEC_LP64 631.deepsjeng_s: -DSPEC_LP64 641.leela_s: -DSPEC_LP64 648.exchange2_s: -DSPEC_LP64 657.xz_s: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -qopenmp -DSPEC_OPENMP -L/usr/local/je5.0.1-64/lib -ljemalloc C++ benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc Fortran benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte -L/usr/local/je5.0.1-64/lib -ljemalloc Base Other Flags ---------------- C benchmarks: -m64 -std=c11 C++ benchmarks: -m64 Fortran benchmarks: -m64 Peak Compiler Invocation ------------------------ C benchmarks: icc C++ benchmarks: icpc Fortran benchmarks: ifort Peak Portability Flags ---------------------- 600.perlbench_s: -DSPEC_LP64 -DSPEC_LINUX_X64 602.gcc_s: -DSPEC_LP64 605.mcf_s: -DSPEC_LP64 620.omnetpp_s: -DSPEC_LP64 623.xalancbmk_s: -D_FILE_OFFSET_BITS=64 -DSPEC_LINUX 625.x264_s: -DSPEC_LP64 631.deepsjeng_s: -DSPEC_LP64 641.leela_s: -DSPEC_LP64 648.exchange2_s: -DSPEC_LP64 657.xz_s: -DSPEC_LP64 Peak Optimization Flags ----------------------- C benchmarks: 600.perlbench_s: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -O2 -xCORE-AVX512 -qopt-mem-layout-trans=3 -ipo -O3 -no-prec-div -DSPEC_SUPPRESS_OPENMP -qopenmp -DSPEC_OPENMP -fno-strict-overflow -L/usr/local/je5.0.1-64/lib -ljemalloc 602.gcc_s: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -O2 -xCORE-AVX512 -qopt-mem-layout-trans=3 -ipo -O3 -no-prec-div -DSPEC_SUPPRESS_OPENMP -qopenmp -DSPEC_OPENMP -L/usr/local/je5.0.1-64/lib -ljemalloc 605.mcf_s: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -DSPEC_SUPPRESS_OPENMP -qopenmp -DSPEC_OPENMP -L/usr/local/je5.0.1-64/lib -ljemalloc 625.x264_s: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -qopenmp -DSPEC_OPENMP -L/usr/local/je5.0.1-64/lib -ljemalloc 657.xz_s: Same as 602.gcc_s C++ benchmarks: 620.omnetpp_s: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -DSPEC_SUPPRESS_OPENMP -qopenmp -DSPEC_OPENMP -L/usr/local/je5.0.1-64/lib -ljemalloc 623.xalancbmk_s: -L/opt/intel/compilers_and_libraries_2018/linux/lib/ia32 -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -DSPEC_SUPPRESS_OPENMP -qopenmp -DSPEC_OPENMP -L/usr/local/je5.0.1-32/lib -ljemalloc 631.deepsjeng_s: Same as 620.omnetpp_s 641.leela_s: Same as 620.omnetpp_s Fortran benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte -L/usr/local/je5.0.1-64/lib -ljemalloc Peak Other Flags ---------------- C benchmarks: -m64 -std=c11 C++ benchmarks (except as noted below): -m64 623.xalancbmk_s: -m32 Fortran benchmarks: -m64 The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.html http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revH.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.xml http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revH.xml SPEC CPU and SPECspeed are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ---------------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2020 Standard Performance Evaluation Corporation Tested with SPEC CPU(R)2017 v1.0.2 on 2010-01-05 09:38:47-0500. Report generated on 2020-08-04 16:39:52 by CPU2017 text formatter v6255. Originally published on 2017-12-26.