SPEC(R) CINT2006 Summary Hewlett Packard Enterprise ProLiant DL360 Gen10 (2.00 GHz, Intel Xeon Gold 6138) Test Sponsor: HPE Sun Nov 12 10:58:07 2017 CPU2006 License: 3 Test date: Nov-2017 Test sponsor: HPE Hardware availability: Oct-2017 Tested by: HPE Software availability: Sep-2017 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 80 613 1280 * 400.perlbench 80 613 1270 S 400.perlbench 80 608 1290 S 401.bzip2 80 979 789 * 401.bzip2 80 970 796 S 401.bzip2 80 982 786 S 403.gcc 80 515 1250 S 403.gcc 80 514 1250 S 403.gcc 80 515 1250 * 429.mcf 80 304 2400 * 429.mcf 80 304 2400 S 429.mcf 80 306 2390 S 445.gobmk 80 735 1140 S 445.gobmk 80 731 1150 * 445.gobmk 80 730 1150 S 456.hmmer 80 314 2380 S 456.hmmer 80 313 2390 S 456.hmmer 80 313 2380 * 458.sjeng 80 809 1200 S 458.sjeng 80 809 1200 S 458.sjeng 80 809 1200 * 462.libquantum 80 51.4 32300 * 462.libquantum 80 51.2 32300 S 462.libquantum 80 51.5 32200 S 464.h264ref 80 900 1970 S 464.h264ref 80 904 1960 * 464.h264ref 80 905 1960 S 471.omnetpp 80 531 942 S 471.omnetpp 80 530 943 * 471.omnetpp 80 530 944 S 473.astar 80 577 974 S 473.astar 80 576 975 S 473.astar 80 576 975 * 483.xalancbmk 80 287 1920 * 483.xalancbmk 80 287 1920 S 483.xalancbmk 80 287 1920 S ============================================================================== 400.perlbench 80 613 1280 * 401.bzip2 80 979 789 * 403.gcc 80 515 1250 * 429.mcf 80 304 2400 * 445.gobmk 80 731 1150 * 456.hmmer 80 313 2380 * 458.sjeng 80 809 1200 * 462.libquantum 80 51.4 32300 * 464.h264ref 80 904 1960 * 471.omnetpp 80 530 943 * 473.astar 80 576 975 * 483.xalancbmk 80 287 1920 * SPECint(R)_rate_base2006 1790 SPECint_rate2006 Not Run HARDWARE -------- CPU Name: Intel Xeon Gold 6138 CPU Characteristics: Intel Turbo Boost Technology up to 3.70 GHz CPU MHz: 2000 FPU: Integrated CPU(s) enabled: 40 cores, 2 chips, 20 cores/chip, 2 threads/core CPU(s) orderable: 1, 2 chip(s) Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 1 MB I+D on chip per core L3 Cache: 27.5 MB I+D on chip per chip Other Cache: None Memory: 192 GB (24 x 8 GB 2Rx8 PC4-2666V-R) Disk Subsystem: 1 x 480 GB SATA SSD, RAID 0 Other Hardware: None SOFTWARE -------- Operating System: SUSE Linux Enterprise Server 12 (x86_64) SP2 Kernel 4.4.21-69-default Compiler: C/C++: Version 18.0.0.128 of Intel C/C++ Compiler for Linux Auto Parallel: No File System: xfs System State: Run level 3 (multi-user) Base Pointers: 32-bit Peak Pointers: Not Applicable Other Software: Microquill SmartHeap V10.2 Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Transparent Huge Pages enabled by default Filesystem page cache cleared with: shell invocation of 'sync; echo 3 > /proc/sys/vm/drop_caches' prior to run runspec command invoked through numactl i.e.: numactl --interleave=all runspec irqbalance disabled with "service irqbalance stop" tuned profile set wtih "tuned-adm profile throughput-performance" VM Dirty ratio was set to 40 using "echo 40 > /proc/sys/vm/dirty_ratio" Numa balancing was disabled using "echo 0 > /proc/sys/kernel/numa_balancing" Platform Notes -------------- BIOS Configuration: Thermal Configuration set to Maximum Cooling LLC Prefetch set to Enabled LLC Dead Line Allocation set to Disabled Memory Patrol Scrubbing set to Disabled Workload Profile set to General Throughput Compute Minimum Processor Idle Power Core C-State set to C1E Sysinfo program /cpu2006/config/sysinfo.rev6993 Revision 6993 of 2015-11-06 (b5e8d4b4eb51ed28d7f98696cbe290c1) running on linux-0s5n Sun Nov 12 09:58:08 2017 This section contains SUT (System Under Test) info as seen by some common utilities. To remove or add to this section, see: http://www.spec.org/cpu2006/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Gold 6138 CPU @ 2.00GHz 2 "physical id"s (chips) 80 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 20 siblings : 40 physical 0: cores 0 1 2 3 8 9 10 11 12 16 17 18 19 20 24 25 26 27 28 physical 1: cores 0 1 2 3 8 9 10 11 12 16 17 18 19 20 24 25 26 27 28 cache size : 28160 KB From /proc/meminfo MemTotal: 197547324 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 2 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP2" VERSION_ID="12.2" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp2" uname -a: Linux linux-0s5n 4.4.21-69-default #1 SMP Tue Oct 25 10:58:20 UTC 2016 (9464f67) x86_64 x86_64 x86_64 GNU/Linux run-level 3 Nov 10 20:28 SPEC is set to: /cpu2006 Filesystem Type Size Used Avail Use% Mounted on /dev/sdb3 xfs 407G 144G 263G 36% /home Additional information from dmidecode: Warning: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS HPE U32 09/29/2017 Memory: 24x UNKNOWN NOT AVAILABLE 8 GB 2 rank 2666 MHz (End of data from sysinfo program) General Notes ------------- Environment variables set by runspec before the start of the run: LD_LIBRARY_PATH = "/cpu2006/libs/32:/cpu2006/libs/64:/cpu2006/sh10.2" Binaries compiled on a system with 1x Intel Core i7-4790 CPU + 32GB RAM memory using Redhat Enterprise Linux 7.2 Base Compiler Invocation ------------------------ C benchmarks: icc -m32 -L/opt/intel/compilers_and_libraries_2018.0.082/linux/lib/ia32 C++ benchmarks: icpc -m32 -L/opt/intel/compilers_and_libraries_2018.0.082/linux/lib/ia32 Base Portability Flags ---------------------- 400.perlbench: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX_IA32 401.bzip2: -D_FILE_OFFSET_BITS=64 403.gcc: -D_FILE_OFFSET_BITS=64 429.mcf: -D_FILE_OFFSET_BITS=64 445.gobmk: -D_FILE_OFFSET_BITS=64 456.hmmer: -D_FILE_OFFSET_BITS=64 458.sjeng: -D_FILE_OFFSET_BITS=64 462.libquantum: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX 464.h264ref: -D_FILE_OFFSET_BITS=64 471.omnetpp: -D_FILE_OFFSET_BITS=64 473.astar: -D_FILE_OFFSET_BITS=64 483.xalancbmk: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX Base Optimization Flags ----------------------- C benchmarks: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -qopt-mem-layout-trans=3 C++ benchmarks: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -qopt-mem-layout-trans=3 -Wl,-z,muldefs -L/cpu2006/sh10.2 -lsmartheap Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic17.0-official-linux64-revF.html http://www.spec.org/cpu2006/flags/HPE-Platform-Flags-Intel-V1.2-SKX-revF.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2006/flags/Intel-ic17.0-official-linux64-revF.xml http://www.spec.org/cpu2006/flags/HPE-Platform-Flags-Intel-V1.2-SKX-revF.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2017 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.2. Report generated on Wed Nov 29 12:30:29 2017 by CPU2006 ASCII formatter v6932. Originally published on 29 November 2017.