SPEC(R) CINT2006 Summary Cisco Systems Cisco UCS C240 M5 (Intel Xeon Silver 4114, 2.20GHz) Sat Sep 2 20:00:32 2017 CPU2006 License: 9019 Test date: Sep-2017 Test sponsor: Cisco Systems Hardware availability: Aug-2017 Tested by: Cisco Systems Software availability: Apr-2017 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 40 598 653 * 40 499 783 S 400.perlbench 40 594 658 S 40 499 783 * 400.perlbench 40 599 653 S 40 498 785 S 401.bzip2 40 967 399 * 40 919 420 * 401.bzip2 40 974 396 S 40 917 421 S 401.bzip2 40 967 399 S 40 936 412 S 403.gcc 40 485 664 * 40 480 670 S 403.gcc 40 485 663 S 40 481 670 * 403.gcc 40 485 665 S 40 481 669 S 429.mcf 40 272 1340 S 40 272 1340 S 429.mcf 40 272 1340 S 40 272 1340 S 429.mcf 40 272 1340 * 40 272 1340 * 445.gobmk 40 745 563 S 40 752 558 S 445.gobmk 40 745 563 * 40 752 558 * 445.gobmk 40 743 564 S 40 751 558 S 456.hmmer 40 276 1350 S 40 222 1680 * 456.hmmer 40 278 1340 S 40 224 1670 S 456.hmmer 40 277 1350 * 40 222 1680 S 458.sjeng 40 802 604 S 40 771 628 S 458.sjeng 40 801 604 S 40 771 628 S 458.sjeng 40 801 604 * 40 771 628 * 462.libquantum 40 90.1 9200 S 40 90.1 9200 S 462.libquantum 40 90.3 9180 S 40 90.3 9180 S 462.libquantum 40 90.2 9190 * 40 90.2 9190 * 464.h264ref 40 864 1020 S 40 827 1070 S 464.h264ref 40 859 1030 * 40 835 1060 S 464.h264ref 40 857 1030 S 40 827 1070 * 471.omnetpp 40 508 492 S 40 463 540 S 471.omnetpp 40 508 492 * 40 462 541 S 471.omnetpp 40 508 492 S 40 463 540 * 473.astar 40 527 533 S 40 527 533 S 473.astar 40 529 531 * 40 529 531 * 473.astar 40 530 530 S 40 530 530 S 483.xalancbmk 40 242 1140 * 40 242 1140 * 483.xalancbmk 40 243 1140 S 40 243 1140 S 483.xalancbmk 40 242 1140 S 40 242 1140 S ============================================================================== 400.perlbench 40 598 653 * 40 499 783 * 401.bzip2 40 967 399 * 40 919 420 * 403.gcc 40 485 664 * 40 481 670 * 429.mcf 40 272 1340 * 40 272 1340 * 445.gobmk 40 745 563 * 40 752 558 * 456.hmmer 40 277 1350 * 40 222 1680 * 458.sjeng 40 801 604 * 40 771 628 * 462.libquantum 40 90.2 9190 * 40 90.2 9190 * 464.h264ref 40 859 1030 * 40 827 1070 * 471.omnetpp 40 508 492 * 40 463 540 * 473.astar 40 529 531 * 40 529 531 * 483.xalancbmk 40 242 1140 * 40 242 1140 * SPECint(R)_rate_base2006 905 SPECint_rate2006 953 HARDWARE -------- CPU Name: Intel Xeon Silver 4114 CPU Characteristics: Intel Turbo Boost Technology up to 3.00 GHz CPU MHz: 2200 FPU: Integrated CPU(s) enabled: 20 cores, 2 chips, 10 cores/chip, 2 threads/core CPU(s) orderable: 1,2 chips Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 1 MB I+D on chip per core L3 Cache: 13.75 MB I+D on chip per chip Other Cache: None Memory: 384 GB (24 x 16 GB 2Rx4 PC4-2666V-R, running at 2400 MHz) Disk Subsystem: 1 x 800 GB SSD SAS Other Hardware: None SOFTWARE -------- Operating System: SUSE Linux Enterprise Server 12 SP2 (x86_64) 4.4.21-69-default Compiler: C/C++: Version 17.0.3.191 of Intel C/C++ Compiler for Linux Auto Parallel: Yes File System: xfs System State: Run level 3 (multi-user) Base Pointers: 32-bit Peak Pointers: 32/64-bit Other Software: Microquill SmartHeap V10.2 Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Platform Notes -------------- BIOS Settings: Intel HyperThreading Technology set to Enabled CPU performance set to Enterprise Power Performance Tuning set to OS SNC set to Enabled IMC Interleaving set to 1-way Interleave Patrol Scrub set to Disabled Sysinfo program /opt/cpu2006-1.2/config/sysinfo.rev6993 Revision 6993 of 2015-11-06 (b5e8d4b4eb51ed28d7f98696cbe290c1) running on linux-0s5q Sat Sep 2 17:00:34 2017 This section contains SUT (System Under Test) info as seen by some common utilities. To remove or add to this section, see: http://www.spec.org/cpu2006/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Silver 4114 CPU @ 2.20GHz 2 "physical id"s (chips) 40 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 10 siblings : 20 physical 0: cores 0 1 2 3 4 8 9 10 11 12 physical 1: cores 0 1 2 3 4 8 9 10 11 12 cache size : 14080 KB From /proc/meminfo MemTotal: 394864292 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 2 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP2" VERSION_ID="12.2" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp2" uname -a: Linux linux-0s5q 4.4.21-69-default #1 SMP Tue Oct 25 10:58:20 UTC 2016 (9464f67) x86_64 x86_64 x86_64 GNU/Linux run-level 3 Sep 2 16:58 SPEC is set to: /opt/cpu2006-1.2 Filesystem Type Size Used Avail Use% Mounted on /dev/sdb2 xfs 700G 61G 640G 9% / Additional information from dmidecode: Warning: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS Cisco Systems, Inc. C240M5.3.1.1d.0.0615170707 06/15/2017 Memory: 24x 0xCE00 M393A2G40EB2-CTD 16 GB 2 rank 2666 MHz, configured at 2400 MHz (End of data from sysinfo program) General Notes ------------- Environment variables set by runspec before the start of the run: LD_LIBRARY_PATH = "/opt/cpu2006-1.2/lib/ia32:/opt/cpu2006-1.2/lib/intel64:/opt/cpu2006-1.2/sh10.2" Binaries compiled on a system with 1x Intel Core i7-4790 CPU + 32GB RAM memory using Redhat Enterprise Linux 7.2 Transparent Huge Pages enabled with: echo always > /sys/kernel/mm/transparent_hugepage/enabled Filesystem page cache cleared with: shell invocation of 'sync; echo 3 > /proc/sys/vm/drop_caches' prior to run runspec command invoked through numactl i.e.: numactl --interleave=all runspec Base Compiler Invocation ------------------------ C benchmarks: icc -m32 -L/opt/intel/compilers_and_libraries_2017/linux/lib/ia32 C++ benchmarks: icpc -m32 -L/opt/intel/compilers_and_libraries_2017/linux/lib/ia32 Base Portability Flags ---------------------- 400.perlbench: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX_IA32 401.bzip2: -D_FILE_OFFSET_BITS=64 403.gcc: -D_FILE_OFFSET_BITS=64 429.mcf: -D_FILE_OFFSET_BITS=64 445.gobmk: -D_FILE_OFFSET_BITS=64 456.hmmer: -D_FILE_OFFSET_BITS=64 458.sjeng: -D_FILE_OFFSET_BITS=64 462.libquantum: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX 464.h264ref: -D_FILE_OFFSET_BITS=64 471.omnetpp: -D_FILE_OFFSET_BITS=64 473.astar: -D_FILE_OFFSET_BITS=64 483.xalancbmk: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX Base Optimization Flags ----------------------- C benchmarks: -xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-prefetch -qopt-mem-layout-trans=3 C++ benchmarks: -xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-prefetch -qopt-mem-layout-trans=3 -Wl,-z,muldefs -L/sh10.2 -lsmartheap Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m32 -L/opt/intel/compilers_and_libraries_2017/linux/lib/ia32 400.perlbench: icc -m64 401.bzip2: icc -m64 456.hmmer: icc -m64 458.sjeng: icc -m64 C++ benchmarks: icpc -m32 -L/opt/intel/compilers_and_libraries_2017/linux/lib/ia32 Peak Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX_X64 401.bzip2: -DSPEC_CPU_LP64 403.gcc: -D_FILE_OFFSET_BITS=64 429.mcf: -D_FILE_OFFSET_BITS=64 445.gobmk: -D_FILE_OFFSET_BITS=64 456.hmmer: -DSPEC_CPU_LP64 458.sjeng: -DSPEC_CPU_LP64 462.libquantum: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX 464.h264ref: -D_FILE_OFFSET_BITS=64 471.omnetpp: -D_FILE_OFFSET_BITS=64 473.astar: -D_FILE_OFFSET_BITS=64 483.xalancbmk: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX Peak Optimization Flags ----------------------- C benchmarks: 400.perlbench: -prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX2(pass 2) -par-num-threads=1(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -auto-ilp32 -qopt-mem-layout-trans=3 401.bzip2: -prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX2(pass 2) -par-num-threads=1(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -qopt-prefetch -auto-ilp32 -qopt-mem-layout-trans=3 403.gcc: -xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 429.mcf: basepeak = yes 445.gobmk: -prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX2(pass 2) -par-num-threads=1(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -qopt-mem-layout-trans=3 456.hmmer: -xCORE-AVX2 -ipo -O3 -no-prec-div -unroll2 -auto-ilp32 -qopt-mem-layout-trans=3 458.sjeng: -prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX2(pass 2) -par-num-threads=1(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -unroll4 -auto-ilp32 -qopt-mem-layout-trans=3 462.libquantum: basepeak = yes 464.h264ref: -prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX2(pass 2) -par-num-threads=1(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -unroll2 -qopt-mem-layout-trans=3 C++ benchmarks: 471.omnetpp: -prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX2(pass 2) -par-num-threads=1(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -qopt-ra-region-strategy=block -qopt-mem-layout-trans=3 -Wl,-z,muldefs -L/sh10.2 -lsmartheap 473.astar: basepeak = yes 483.xalancbmk: basepeak = yes Peak Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic17.0-official-linux64-revF.html http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revH.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2006/flags/Intel-ic17.0-official-linux64-revF.xml http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revH.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2017 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.2. Report generated on Wed Sep 20 11:03:35 2017 by CPU2006 ASCII formatter v6932. Originally published on 19 September 2017.