SPEC(R) CINT2006 Summary Cisco Systems Cisco UCS C220 M4 (Intel Xeon E5-2650 v4, 2.20 GHz) Mon Aug 8 19:25:08 2016 CPU2006 License: 9019 Test date: Aug-2016 Test sponsor: Cisco Systems Hardware availability: Apr-2016 Tested by: Cisco Systems Software availability: Dec-2015 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 48 663 707 * 48 536 875 S 400.perlbench 48 664 706 S 48 535 876 * 400.perlbench 48 663 707 S 48 534 879 S 401.bzip2 48 985 470 S 48 956 485 S 401.bzip2 48 983 471 * 48 953 486 S 401.bzip2 48 983 471 S 48 955 485 * 403.gcc 48 521 741 * 48 517 748 S 403.gcc 48 522 740 S 48 523 739 S 403.gcc 48 521 742 S 48 518 745 * 429.mcf 48 326 1340 S 48 326 1340 S 429.mcf 48 325 1350 S 48 325 1350 S 429.mcf 48 326 1340 * 48 326 1340 * 445.gobmk 48 785 641 S 48 772 653 * 445.gobmk 48 784 642 S 48 771 653 S 445.gobmk 48 785 641 * 48 772 652 S 456.hmmer 48 311 1440 S 48 267 1680 S 456.hmmer 48 310 1440 S 48 266 1680 S 456.hmmer 48 311 1440 * 48 267 1680 * 458.sjeng 48 875 664 * 48 827 702 S 458.sjeng 48 875 664 S 48 827 702 * 458.sjeng 48 875 664 S 48 827 702 S 462.libquantum 48 101 9840 S 48 101 9840 S 462.libquantum 48 101 9840 * 48 101 9840 * 462.libquantum 48 101 9830 S 48 101 9830 S 464.h264ref 48 888 1200 * 48 873 1220 S 464.h264ref 48 889 1190 S 48 872 1220 * 464.h264ref 48 886 1200 S 48 871 1220 S 471.omnetpp 48 572 524 S 48 537 559 S 471.omnetpp 48 571 526 S 48 537 558 * 471.omnetpp 48 572 525 * 48 538 558 S 473.astar 48 583 578 * 48 583 578 * 473.astar 48 582 579 S 48 582 579 S 473.astar 48 583 578 S 48 583 578 S 483.xalancbmk 48 276 1200 * 48 276 1200 * 483.xalancbmk 48 276 1200 S 48 276 1200 S 483.xalancbmk 48 277 1200 S 48 277 1200 S ============================================================================== 400.perlbench 48 663 707 * 48 535 876 * 401.bzip2 48 983 471 * 48 955 485 * 403.gcc 48 521 741 * 48 518 745 * 429.mcf 48 326 1340 * 48 326 1340 * 445.gobmk 48 785 641 * 48 772 653 * 456.hmmer 48 311 1440 * 48 267 1680 * 458.sjeng 48 875 664 * 48 827 702 * 462.libquantum 48 101 9840 * 48 101 9840 * 464.h264ref 48 888 1200 * 48 872 1220 * 471.omnetpp 48 572 525 * 48 537 558 * 473.astar 48 583 578 * 48 583 578 * 483.xalancbmk 48 276 1200 * 48 276 1200 * SPECint(R)_rate_base2006 989 SPECint_rate2006 1040 HARDWARE -------- CPU Name: Intel Xeon E5-2650 v4 CPU Characteristics: Intel Turbo Boost Technology up to 2.90 GHz CPU MHz: 2200 FPU: Integrated CPU(s) enabled: 24 cores, 2 chips, 12 cores/chip, 2 threads/core CPU(s) orderable: 1,2 chips Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 256 KB I+D on chip per core L3 Cache: 30 MB I+D on chip per chip Other Cache: None Memory: 256 GB (16 x 16 GB 2Rx4 PC4-2400T-R) Disk Subsystem: 1 x 300 GB SAS HDD, 15K RPM Other Hardware: None SOFTWARE -------- Operating System: SUSE Linux Enterprise Server 12 SP1 (x86_64) 3.12.49-11-default Compiler: C/C++: Version 16.0.0.101 of Intel C++ Studio XE for Linux Auto Parallel: No File System: xfs System State: Run level 3 (multi-user) Base Pointers: 32/64-bit Peak Pointers: 32/64-bit Other Software: Microquill SmartHeap V10.2 Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Platform Notes -------------- BIOS Settings: CPU performance set to Enterprise Power Technology set to Performance Energy Performance BIAS setting set to Balanced Performance Memory RAS configuration set to Maximum Performance Memory Power Saving Mode set to Disabled QPI Snoop Mode set to Cluster-on-Die Sysinfo program /opt/cpu2006-1.2/config/sysinfo.rev6914 $Rev: 6914 $ $Date:: 2014-06-25 #$ e3fbb8667b5a285932ceab81e28219e1 running on linux-6mvl Mon Aug 8 16:25:09 2016 This section contains SUT (System Under Test) info as seen by some common utilities. To remove or add to this section, see: http://www.spec.org/cpu2006/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) CPU E5-2650 v4@ 2.20GHz 2 "physical id"s (chips) 48 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 12 siblings : 24 physical 0: cores 0 1 2 3 4 5 8 9 10 11 12 13 physical 1: cores 0 1 2 3 4 5 8 9 10 11 12 13 cache size : 15360 KB From /proc/meminfo MemTotal: 264565192 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 1 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP1" VERSION_ID="12.1" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP1" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp1" uname -a: Linux linux-6mvl 3.12.49-11-default #1 SMP Wed Nov 11 20:52:43 UTC 2015 (8d714a0) x86_64 x86_64 x86_64 GNU/Linux run-level 3 Aug 8 16:21 SPEC is set to: /opt/cpu2006-1.2 Filesystem Type Size Used Avail Use% Mounted on /dev/sda1 xfs 279G 16G 263G 6% / Additional information from dmidecode: Warning: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS Cisco Systems, Inc. C220M4.2.0.10c.0.032320160810 03/23/2016 Memory: 16x 0xCE00 M393A2G40EB1-CRC 16 GB 2 rank 2400 MHz 8x NO DIMM NO DIMM (End of data from sysinfo program) General Notes ------------- Environment variables set by runspec before the start of the run: LD_LIBRARY_PATH = "/opt/cpu2006-1.2/libs/32:/opt/cpu2006-1.2/libs/64:/opt/cpu2006-1.2/sh" Binaries compiled on a system with 1x Intel Core i5-4670K CPU + 32GB memory using RedHat EL 7.1 Transparent Huge Pages enabled with: echo always > /sys/kernel/mm/transparent_hugepage/enabled Filesystem page cache cleared with: echo 1> /proc/sys/vm/drop_caches runspec command invoked through numactl i.e.: numactl --interleave=all runspec Base Compiler Invocation ------------------------ C benchmarks: icc -m32 -L/opt/intel/compilers_and_libraries_2016/linux/compiler/lib/ia32_lin C++ benchmarks: icpc -m32 -L/opt/intel/compilers_and_libraries_2016/linux/compiler/lib/ia32_lin Base Portability Flags ---------------------- 400.perlbench: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX_IA32 401.bzip2: -D_FILE_OFFSET_BITS=64 403.gcc: -D_FILE_OFFSET_BITS=64 429.mcf: -D_FILE_OFFSET_BITS=64 445.gobmk: -D_FILE_OFFSET_BITS=64 456.hmmer: -D_FILE_OFFSET_BITS=64 458.sjeng: -D_FILE_OFFSET_BITS=64 462.libquantum: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX 464.h264ref: -D_FILE_OFFSET_BITS=64 471.omnetpp: -D_FILE_OFFSET_BITS=64 473.astar: -D_FILE_OFFSET_BITS=64 483.xalancbmk: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX Base Optimization Flags ----------------------- C benchmarks: -xCORE-AVX2 -ipo -O3 -no-prec-div -opt-prefetch -opt-mem-layout-trans=3 C++ benchmarks: -xCORE-AVX2 -ipo -O3 -no-prec-div -opt-prefetch -opt-mem-layout-trans=3 -Wl,-z,muldefs -L/sh -lsmartheap Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m32 -L/opt/intel/compilers_and_libraries_2016/linux/compiler/lib/ia32_lin 400.perlbench: icc -m64 401.bzip2: icc -m64 456.hmmer: icc -m64 458.sjeng: icc -m64 C++ benchmarks: icpc -m32 -L/opt/intel/compilers_and_libraries_2016/linux/compiler/lib/ia32_lin Peak Portability Flags ---------------------- 400.perlbench: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX_X64 401.bzip2: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LP64 403.gcc: -D_FILE_OFFSET_BITS=64 429.mcf: -D_FILE_OFFSET_BITS=64 445.gobmk: -D_FILE_OFFSET_BITS=64 456.hmmer: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LP64 458.sjeng: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LP64 462.libquantum: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX 464.h264ref: -D_FILE_OFFSET_BITS=64 471.omnetpp: -D_FILE_OFFSET_BITS=64 473.astar: -D_FILE_OFFSET_BITS=64 483.xalancbmk: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX Peak Optimization Flags ----------------------- C benchmarks: 400.perlbench: -xCORE-AVX2(pass 2) -prof-gen:threadsafe(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -par-num-threads=1(pass 1) -prof-use(pass 2) -auto-ilp32 401.bzip2: -xCORE-AVX2(pass 2) -prof-gen:threadsafe(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -par-num-threads=1(pass 1) -prof-use(pass 2) -opt-prefetch -auto-ilp32 -ansi-alias 403.gcc: -xCORE-AVX2 -ipo -O3 -no-prec-div 429.mcf: basepeak = yes 445.gobmk: -xCORE-AVX2(pass 2) -prof-gen:threadsafe(pass 1) -prof-use(pass 2) -par-num-threads=1(pass 1) -ansi-alias -opt-mem-layout-trans=3 456.hmmer: -xCORE-AVX2 -ipo -O3 -no-prec-div -unroll2 -auto-ilp32 458.sjeng: -xCORE-AVX2(pass 2) -prof-gen:threadsafe(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -par-num-threads=1(pass 1) -prof-use(pass 2) -unroll4 -auto-ilp32 462.libquantum: basepeak = yes 464.h264ref: -xCORE-AVX2(pass 2) -prof-gen:threadsafe(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -par-num-threads=1(pass 1) -prof-use(pass 2) -unroll2 -ansi-alias C++ benchmarks: 471.omnetpp: -xCORE-AVX2(pass 2) -prof-gen:threadsafe(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -par-num-threads=1(pass 1) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=block -Wl,-z,muldefs -L/sh -lsmartheap 473.astar: basepeak = yes 483.xalancbmk: basepeak = yes Peak Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic16.0-official-linux64.html http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revE.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2006/flags/Intel-ic16.0-official-linux64.xml http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revE.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2016 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.2. Report generated on Tue Sep 6 16:58:00 2016 by CPU2006 ASCII formatter v6932. Originally published on 6 September 2016.