SPEC(R) CINT2006 Summary Cisco Systems Cisco UCS B420 M4 (Intel Xeon E5-4655 v3, 2.90 GHz) Tue Jul 21 08:02:18 2015 CPU2006 License: 9019 Test date: Jul-2015 Test sponsor: Cisco Systems Hardware availability: Jun-2015 Tested by: Cisco Systems Software availability: Nov-2014 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 48 583 805 S 48 459 1020 S 400.perlbench 48 578 811 S 48 458 1020 * 400.perlbench 48 580 808 * 48 457 1030 S 401.bzip2 48 748 619 * 48 705 657 * 401.bzip2 48 748 619 S 48 705 657 S 401.bzip2 48 748 619 S 48 706 656 S 403.gcc 48 404 957 S 48 405 954 * 403.gcc 48 406 952 * 48 405 955 S 403.gcc 48 407 950 S 48 407 948 S 429.mcf 48 266 1650 S 48 266 1650 S 429.mcf 48 264 1660 S 48 264 1660 S 429.mcf 48 264 1660 * 48 264 1660 * 445.gobmk 48 667 755 S 48 662 760 S 445.gobmk 48 668 754 S 48 662 760 * 445.gobmk 48 667 755 * 48 662 760 S 456.hmmer 48 265 1690 * 48 232 1930 S 456.hmmer 48 267 1680 S 48 232 1930 * 456.hmmer 48 265 1690 S 48 231 1930 S 458.sjeng 48 735 790 * 48 703 826 * 458.sjeng 48 734 791 S 48 703 826 S 458.sjeng 48 735 790 S 48 703 827 S 462.libquantum 48 82.3 12100 S 48 82.3 12100 S 462.libquantum 48 82.4 12100 S 48 82.4 12100 S 462.libquantum 48 82.4 12100 * 48 82.4 12100 * 464.h264ref 48 803 1320 S 48 800 1330 S 464.h264ref 48 819 1300 * 48 799 1330 * 464.h264ref 48 823 1290 S 48 795 1340 S 471.omnetpp 48 446 673 S 48 419 716 S 471.omnetpp 48 442 678 S 48 418 718 S 471.omnetpp 48 443 677 * 48 419 717 * 473.astar 48 492 685 * 48 492 685 * 473.astar 48 494 682 S 48 494 682 S 473.astar 48 491 686 S 48 491 686 S 483.xalancbmk 48 242 1370 S 48 242 1370 S 483.xalancbmk 48 242 1370 * 48 242 1370 * 483.xalancbmk 48 242 1370 S 48 242 1370 S ============================================================================== 400.perlbench 48 580 808 * 48 458 1020 * 401.bzip2 48 748 619 * 48 705 657 * 403.gcc 48 406 952 * 48 405 954 * 429.mcf 48 264 1660 * 48 264 1660 * 445.gobmk 48 667 755 * 48 662 760 * 456.hmmer 48 265 1690 * 48 232 1930 * 458.sjeng 48 735 790 * 48 703 826 * 462.libquantum 48 82.4 12100 * 48 82.4 12100 * 464.h264ref 48 819 1300 * 48 799 1330 * 471.omnetpp 48 443 677 * 48 419 717 * 473.astar 48 492 685 * 48 492 685 * 483.xalancbmk 48 242 1370 * 48 242 1370 * SPECint(R)_rate_base2006 1190 SPECint_rate2006 1250 HARDWARE -------- CPU Name: Intel Xeon E5-4655 v3 CPU Characteristics: Intel Turbo Boost Technology up to 3.20 GHz CPU MHz: 2900 FPU: Integrated CPU(s) enabled: 24 cores, 4 chips, 6 cores/chip, 2 threads/core CPU(s) orderable: 2,4 chip Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 256 KB I+D on chip per core L3 Cache: 30 MB I+D on chip per chip Other Cache: None Memory: 512 GB (32 x 16 GB 2Rx4 PC4-2133P-R) Disk Subsystem: 1 x 300 GB SAS, 15K RPM Other Hardware: None SOFTWARE -------- Operating System: SUSE Linux Enterprise Server 12 (x86_64) 3.12.28-4-default Compiler: C/C++: Version 15.0.0.090 of Intel C++ Studio XE for Linux Auto Parallel: No File System: xfs System State: Run level 3 (multi-user) Base Pointers: 32-bit Peak Pointers: 32/64-bit Other Software: Microquill SmartHeap V10.0 Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Platform Notes -------------- BIOS Configuraton: CPU performance set to Enterprise Power Technology set to Energy-Efficient Energy Performance BIAS setting set to Balanced Performance Memory RAS configuration set to Maximum Performance LV DDR Mode set to Performance-mode Sysinfo program /opt/cpu2006-1.2/config/sysinfo.rev6914 $Rev: 6914 $ $Date:: 2014-06-25 #$ e3fbb8667b5a285932ceab81e28219e1 running on linux-616o Tue Jul 21 17:32:19 2015 This section contains SUT (System Under Test) info as seen by some common utilities. To remove or add to this section, see: http://www.spec.org/cpu2006/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) CPU E5-4655 v3 @ 2.90GHz 4 "physical id"s (chips) 48 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 6 siblings : 12 physical 0: cores 1 3 5 9 11 12 physical 1: cores 1 3 5 9 11 12 physical 2: cores 1 3 5 9 11 12 physical 3: cores 1 3 5 9 11 12 cache size : 30720 KB From /proc/meminfo MemTotal: 529334820 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 0 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12" VERSION_ID="12" PRETTY_NAME="SUSE Linux Enterprise Server 12" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12" uname -a: Linux linux-616o 3.12.28-4-default #1 SMP Thu Sep 25 17:02:34 UTC 2014 (9879bd4) x86_64 x86_64 x86_64 GNU/Linux run-level 3 Jul 21 17:21 SPEC is set to: /opt/cpu2006-1.2 Filesystem Type Size Used Avail Use% Mounted on /dev/sdc2 xfs 250G 13G 238G 5% / Additional information from dmidecode: Warning: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS Cisco Systems, Inc. B420M4.2.2.5.0.043020152304 04/30/2015 Memory: 32x 0xCE00 M393A2G40DB0-CPB 16 GB 2 rank 2133 MHz 16x NO DIMM NO DIMM (End of data from sysinfo program) General Notes ------------- Environment variables set by runspec before the start of the run: LD_LIBRARY_PATH = "/opt/cpu2006-1.2/libs/32:/opt/cpu2006-1.2/libs/64:/opt/cpu2006-1.2/sh" Binaries compiled on a system with 1x Core i5-4670K CPU + 16GB memory using RedHat EL 7.0 Transparent Huge Pages enabled with: echo always > /sys/kernel/mm/transparent_hugepage/enabled Filesystem page cache cleared with: echo 1> /proc/sys/vm/drop_caches runspec command invoked through numactl i.e.: numactl --interleave=all runspec Base Compiler Invocation ------------------------ C benchmarks: icc -m32 -L/opt/intel/composer_xe_2015/lib/ia32 C++ benchmarks: icpc -m32 -L/opt/intel/composer_xe_2015/lib/ia32 Base Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LINUX_IA32 462.libquantum: -DSPEC_CPU_LINUX 483.xalancbmk: -DSPEC_CPU_LINUX Base Optimization Flags ----------------------- C benchmarks: -xCORE-AVX2 -ipo -O3 -no-prec-div -opt-prefetch -opt-mem-layout-trans=3 C++ benchmarks: -xCORE-AVX2 -ipo -O3 -no-prec-div -opt-prefetch -opt-mem-layout-trans=3 -Wl,-z,muldefs -L/sh -lsmartheap Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m32 -L/opt/intel/composer_xe_2015/lib/ia32 400.perlbench: icc -m64 401.bzip2: icc -m64 456.hmmer: icc -m64 458.sjeng: icc -m64 C++ benchmarks: icpc -m32 -L/opt/intel/composer_xe_2015/lib/ia32 Peak Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX_X64 401.bzip2: -DSPEC_CPU_LP64 456.hmmer: -DSPEC_CPU_LP64 458.sjeng: -DSPEC_CPU_LP64 462.libquantum: -DSPEC_CPU_LINUX 483.xalancbmk: -DSPEC_CPU_LINUX Peak Optimization Flags ----------------------- C benchmarks: 400.perlbench: -xCORE-AVX2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -auto-ilp32 401.bzip2: -xCORE-AVX2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -opt-prefetch -auto-ilp32 -ansi-alias 403.gcc: -xCORE-AVX2 -ipo -O3 -no-prec-div 429.mcf: basepeak = yes 445.gobmk: -xCORE-AVX2(pass 2) -prof-gen(pass 1) -prof-use(pass 2) -ansi-alias -opt-mem-layout-trans=3 456.hmmer: -xCORE-AVX2 -ipo -O3 -no-prec-div -unroll2 -auto-ilp32 458.sjeng: -xCORE-AVX2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -unroll4 -auto-ilp32 462.libquantum: basepeak = yes 464.h264ref: -xCORE-AVX2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -unroll2 -ansi-alias C++ benchmarks: 471.omnetpp: -xCORE-AVX2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=block -Wl,-z,muldefs -L/sh -lsmartheap 473.astar: basepeak = yes 483.xalancbmk: basepeak = yes Peak Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic15.0-official-linux64.html http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revC.20150812.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2006/flags/Intel-ic15.0-official-linux64.xml http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revC.20150812.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2015 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.2. Report generated on Wed Aug 12 11:08:10 2015 by CPU2006 ASCII formatter v6932. Originally published on 12 August 2015.