SPEC® CINT2006 Result

Cisco Systems

Cisco UCS B440 M1 (Intel Xeon L7555, 1.87 GHz)

Hardware
CPU Name:	Intel Xeon L7555
CPU Characteristics:	Intel Turbo Boost Technology up to 2.53 GHz
CPU MHz:	1867
FPU:	Integrated
CPU(s) enabled:	32 cores, 4 chips, 8 cores/chip, 2 threads/core
CPU(s) orderable:	1,2,3,4 chips
Primary Cache:	32 KB I + 32 KB D on chip per core
Secondary Cache:	256 KB I+D on chip per core
L3 Cache:	24 MB I+D on chip per chip
Other Cache:	None
Memory:	512 GB (64 x 8 GB 4Rx4 PC3-8500R, ECC)
Disk Subsystem:	146 GB SAS, 15K RPM
Other Hardware:	None

Software
Operating System:	SuSe Linux Enterprise Server 11 (x86_64), Kernel 2.6.27-19-5-default
Compiler:	Intel C++ Professional Compiler for IA32 and Intel 64, Version 11.1 Build 20091130 Package ID: l_cproc_p_11.1.064
Auto Parallel:	No
File System:	ext3
System State:	Run level 3 (multi-user)
Base Pointers:	32-bit
Peak Pointers:	32/64-bit
Other Software:	MicroQuill SmartHeap Library V8.1

Results Table

Benchmark	Base							Peak
Benchmark	Copies	Seconds	Ratio	Seconds	Ratio	Seconds	Ratio	Copies	Seconds	Ratio	Seconds	Ratio	Seconds	Ratio
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
400.perlbench	64	1202	520	1199	522	1205	519	64	1021	613	1024	611	1022	612
401.bzip2	64	1558	396	1555	397	1557	397	64	1473	419	1466	421	1474	419
403.gcc	64	1043	494	1040	496	1045	493	64	1058	487	1045	493	1047	492
429.mcf	64	779	750	777	751	784	745	64	779	749	777	751	780	748
445.gobmk	64	1104	608	1104	608	1102	609	64	1012	664	1009	665	1013	663
456.hmmer	64	704	848	702	851	702	851	64	550	1080	546	1090	549	1090
458.sjeng	64	1387	558	1388	558	1388	558	64	1262	613	1263	613	1263	613
462.libquantum	64	864	1530	863	1540	865	1530	64	863	1540	862	1540	864	1540
464.h264ref	64	1758	805	1826	776	1748	810	64	1762	804	1788	792	1742	813
471.omnetpp	64	925	432	925	432	925	432	64	849	471	849	471	849	471
473.astar	64	1167	385	1169	384	1167	385	64	1053	427	1053	427	1053	427
483.xalancbmk	64	661	668	662	667	663	667	64	661	668	662	667	663	667

The config file option 'submit' was used.
 numactl was used to bind copies to the cores

ulimit -s unlimited was used to set the stacksize to unlimited prior to run

Binaries were compiled on SLES 10 with Binutils 2.18.50.0.7.20080502

icc -m32

icpc -m32

-xSSE4.2 -ipo -O3 -no-prec-div -static -opt-prefetch

403.gcc:

	icpc -m32
473.astar:	icpc -m64

400.perlbench:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -ansi-alias
401.bzip2:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -opt-prefetch -ansi-alias -auto-ilp32
403.gcc:	-xSSE4.2 -ipo -O3 -no-prec-div -static
429.mcf:	-xSSE4.2 -ipo -O3 -no-prec-div -static -opt-prefetch
445.gobmk:	-xSSE4.2(pass 2) -prof-gen(pass 1) -prof-use(pass 2) -O2 -ipo -no-prec-div -ansi-alias
456.hmmer:	-xSSE4.2 -ipo -O3 -no-prec-div -static -unroll2 -ansi-alias -auto-ilp32
458.sjeng:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -unroll4 -auto-ilp32
462.libquantum:	-xSSE4.2 -ipo -O3 -no-prec-div -static -auto-ilp32 -opt-prefetch
464.h264ref:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -unroll2 -ansi-alias

471.omnetpp:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=block -Wl,-z,muldefs -L/home/cmplr/usr3/alrahate/cpu2006.1.1.ic11.1/libic11.1-32bit -lsmartheap
473.astar:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=routine -Wl,-z,muldefs -L/home/cmplr/usr3/alrahate/cpu2006.1.1.ic11.1/libic11.1-64bit -lsmartheap64
483.xalancbmk:	basepeak = yes

403.gcc:

You can also download the XML flags source by saving the following link:
http://www.spec.org/cpu2006/flags/Intel-ic11.1-linux64-revE.20100316.xml.